Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402405 | Integration of multiple fin stuctures on a single substrate | Chih-Chao Chou, Chih-Hao Wang, Shi Ning Ju, Kuo-Cheng Chiang | 2025-08-26 |
| 12396246 | Semiconductor integrated circuit including gate-all-around FETs with nanosheet channels and Fin-like FETs | Kuan-Ting Pan, Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang | 2025-08-19 |
| 12317542 | Semiconductor device with backside self-aligned power rail and methods of forming the same | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2025-05-27 |
| 12183678 | Backside power rail structure and methods of forming same | Kuo-Cheng Chiang, Shi Ning Ju, Chih-Chao Chou, Chih-Hao Wang | 2024-12-31 |
| 12062705 | Semiconductor device and method of forming vertical structure | Chih-Hao Wang, Shi Ning Ju, Kai-Chieh Yang, Wai-Yi Lien | 2024-08-13 |
| 12057385 | Integrated circuits with backside power rails | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2024-08-06 |
| 12057477 | Semiconductor structure with hybrid nanostructures | Guan-Lin Chen, Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang, Ching-Wei Tsai +1 more | 2024-08-06 |
| 12040329 | Semiconductor device structure and methods of forming the same | Shi Ning Ju, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang | 2024-07-16 |
| 11973079 | Integration of multiple fin structures on a single substrate | Chih-Chao Chou, Chih-Hao Wang, Shi Ning Ju, Kuo-Cheng Chiang | 2024-04-30 |
| 11961915 | Capacitance reduction for back-side power rail device | Shi Ning Ju, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng | 2024-04-16 |
| 11916125 | Semiconductor device with backside self-aligned power rail and methods of forming the same | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2024-02-27 |
| 11842965 | Backside power rail structure and methods of forming same | Kuo-Cheng Chiang, Shi Ning Ju, Chih-Chao Chou, Chih-Hao Wang | 2023-12-12 |
| 11742280 | Integrated circuits with backside power rails | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2023-08-29 |
| 11664378 | Semiconductor device structure and methods of forming the same | Shi Ning Ju, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang | 2023-05-30 |
| 11444170 | Semiconductor device with backside self-aligned power rail and methods of forming the same | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2022-09-13 |
| 11387181 | Integrated circuits with backside power rails | Chih-Chao Chou, Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang | 2022-07-12 |
| 11342325 | Integration of multiple fin structures on a single substrate | Chih-Chao Chou, Chih-Hao Wang, Shi Ning Ju, Kuo-Cheng Chiang | 2022-05-24 |
| 11302580 | Nanosheet thickness | Kuan-Ting Pan, Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang | 2022-04-12 |
| 11289606 | Capacitance reduction for back-side power rail device | Shi Ning Ju, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng | 2022-03-29 |
| 11264327 | Backside power rail structure and methods of forming same | Kuo-Cheng Chiang, Shi Ning Ju, Chih-Chao Chou, Chih-Hao Wang | 2022-03-01 |
| 11257903 | Method for manufacturing semiconductor structure with hybrid nanostructures | Guan-Lin Chen, Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang, Ching-Wei Tsai +1 more | 2022-02-22 |
| 10854723 | Semiconductor device and method of forming vertical structure | Chih-Hao Wang, Wai-Yi Lien, Shi Ning Ju, Kai-Chieh Yang | 2020-12-01 |
| 10833003 | Integrated circuits with backside power rails | Chih-Chao Chou, Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2020-11-10 |
| 10755943 | Method for manufacturing semiconductor device | Jung-Hao Chang, Chao-Hsien Huang, Shi Ning Ju, Li-Te Lin, Kuo-Cheng Ching | 2020-08-25 |
| 10157751 | Method for manufacturing semiconductor device | Jung-Hao Chang, Chao-Hsien Huang, Shi Ning Ju, Li-Te Lin, Kuo-Cheng Ching | 2018-12-18 |