Issued Patents All Time
Showing 76–100 of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11107904 | Inner spacer formation in multi-gate transistors | Han-Yu Lin, Chansyun David Yang, Tze-Chung Lin, Fang-Wei Lee, Fo-Ju Lin +1 more | 2021-08-31 |
| 11107907 | Semiconductor device and method for manufacturing the same | Jung-Hao Chang | 2021-08-31 |
| 11094556 | Method of manufacturing semiconductor devices using directional process | Ya-Wen Yeh, Yu-Tien Shen, Shih-Chun Huang, Po-Chin Chang, Wei-Liang Lin +4 more | 2021-08-17 |
| 11081354 | Fin patterning methods for increased process margins | Chin-Yuan Tseng, Wei-Liang Lin, Ru-Gun Liu, Min Cao | 2021-08-03 |
| 11056393 | Method for FinFET fabrication and structure thereof | Han-Yu Lin, Yi-Ruei Jhan, Fang-Wei Lee, Tze-Chung Lin, Chao-Hsien Huang +2 more | 2021-07-06 |
| 11043381 | Directional patterning method | Po-Chin Chang, Ru-Gun Liu, Wei-Liang Lin, Pinyen Lin, Yu-Tien Shen +1 more | 2021-06-22 |
| 11024721 | Semiconductor device and manufacturing method thereof | Zhi-Qiang WU, Kuo-An Liu, Chan-Lon Yang, Bharath Kumar Pulicherla, Chung-Cheng Wu +2 more | 2021-06-01 |
| 10998421 | Reducing pattern loading in the etch-back of metal gate | Po-Chin Chang, Wei-Hao Wu, Pinyen Lin | 2021-05-04 |
| 10964795 | Air spacers in transistors and methods forming same | Yi-Lun Chen, Chao-Hsien Huang, Chun-Hsiung Lin | 2021-03-30 |
| 10957779 | Gate etch back with reduced loading effect | Yi-Chen Lo, Jung-Hao Chang, Pinyen Lin | 2021-03-23 |
| 10950434 | Methods of reducing gate spacer loss during semiconductor manufacturing | Yi-Ruei Jhan, Han-Yu Lin, Pinyen Lin | 2021-03-16 |
| 10861706 | Etch selectivity improved by laser beam | Christine Y Ouyang | 2020-12-08 |
| 10861698 | Pattern fidelity enhancement | Yu-Tien Shen, Ya-Wen Yeh, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen +3 more | 2020-12-08 |
| 10861745 | Semiconductor device and method of manufacture | Chan Syun David Yang, Chun-Jui Huang | 2020-12-08 |
| 10861953 | Air spacers in transistors and methods forming same | Yi-Lun Chen, Chao-Hsien Huang, Chun-Hsiung Lin | 2020-12-08 |
| 10847633 | Method for forming semiconductor device | Yi-Ruei Jhan, Yi-Lun Chen, Fang-Wei Lee, Han-Yu Lin, Pinyen Lin | 2020-11-24 |
| 10790195 | Elongated pattern and formation thereof | Po-Chin Chang, Pinyen Lin | 2020-09-29 |
| 10777455 | Multi-etching process for forming via opening in semiconductor device structure | Chun-Jui Huang, Pinyen Lin | 2020-09-15 |
| 10755943 | Method for manufacturing semiconductor device | Jung-Hao Chang, Chao-Hsien Huang, Wen-Ting Lan, Shi Ning Ju, Kuo-Cheng Ching | 2020-08-25 |
| 10755968 | Method of forming semiconductor structure having layer with re-entrant profile | Yi-Shan Chen, Chan Syun David Yang, Pinyen Lin | 2020-08-25 |
| 10741671 | Method for manufacturing semiconductor device | Yi-Chen Lo, Pinyen Lin | 2020-08-11 |
| 10707081 | Fine line patterning methods | Shih-Chun Huang, Chiu-Hsiang Chen, Ya-Wen Yeh, Yu-Tien Shen, Po-Chin Chang +7 more | 2020-07-07 |
| 10680109 | CMOS semiconductor device having fins and method of fabricating the same | Shu-Hao Kuo, Jung-Hao Chang, Chao-Hsien Huang, Kuo-Cheng Ching | 2020-06-09 |
| 10645650 | Computer power saving method and computer waking method | Ko-Hui Lin, Yi-Ming Teng | 2020-05-05 |
| 10535520 | Fin patterning methods for increased process margins | Chin-Yuan Tseng, Wei-Liang Lin, Ru-Gun Liu, Min Cao | 2020-01-14 |