HC

Hsien-Wei Chen

TSMC: 846 patents #3 of 12,232Top 1%
AI Acer Incorporated: 11 patents #87 of 935Top 10%
DP Dell Products: 1 patents #3,684 of 6,820Top 55%
Overall (All Time): #88 of 4,157,543Top 1%
858
Patents All Time

Issued Patents All Time

Showing 301–325 of 858 patents

Patent #TitleCo-InventorsDate
10950579 Integrated circuit package and method of forming same Ming-Fa Chen, Chen-Hua Yu 2021-03-16
10950577 Redistribution layers in semiconductor packages and methods of forming same Cheng-Hsien Hsieh, Li-Han Hsu, Wei-Cheng Wu, Der-Chyang Yeh, Chi-Hsi Wu +1 more 2021-03-16
10950576 Package structure Tzuan-Horng Liu, Jiun-Heng Wang, Ming-Fa Chen 2021-03-16
10950575 Package structure and method of forming the same Chen-Hua Yu, Li-Hsien Huang, Chi-Hsi Wu, Der-Chyang Yeh, An-Jhih Su +1 more 2021-03-16
10943889 Semiconductor device and method of manufacture Ying-Ju Chen, An-Jhih Su, Jie Chen 2021-03-09
10943798 Fan-out structure and method of fabricating the same Chen-Hua Yu, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Wei-Yu Chen 2021-03-09
10939551 Opening in the pad for bonding integrated passive device in InFO package Cheng-Hsien Hsieh, Chi-Hsi Wu, Chen-Hua Yu, Der-Chyang Yeh, Li-Han Hsu +1 more 2021-03-02
10937743 Mixing organic materials into hybrid packages Ming-Fa Chen, Chih-Chia Hu, Chen-Hua Yu 2021-03-02
10930633 Buffer design for package integration Jie Chen, Ming-Fa Chen, Chen-Hua Yu 2021-02-23
10930580 Semiconductor device and method of manufacture Chih-Chia Hu, Sen-Bor Jan, Ming-Fa Chen 2021-02-23
10923421 Package structure and method of manufacturing the same Ying-Ju Chen, Ming-Fa Chen 2021-02-16
10886245 Semiconductor structure, 3DIC structure and method of fabricating the same Jie Chen, Ming-Fa Chen, Sung-Feng Yeh 2021-01-05
10886238 Supporting InFO packages to reduce warpage Jie Chen, Ying-Ju Chen 2021-01-05
10879138 Semiconductor packaging structure including interconnection to probe pad with probe mark and method of manufacturing the same Ching-Jung Yang, Jie Chen 2020-12-29
10879198 Package with solder regions aligned to recesses Ching-Jung Yang, Hsien-Ming Tu, Chang-Pin Huang, Yu-Chia Lai, Tung-Liang Shao 2020-12-29
10872865 Electric magnetic shielding structure in packages Chen-Hua Yu, Shin-Puu Jeng, Der-Chyang Yeh, Jie Chen 2020-12-22
10867966 Package structure, package-on-package structure and method of fabricating the same Ming-Fa Chen, Sung-Feng Yeh, Chao-Wen Shih 2020-12-15
10867967 Chip package with redistribution layers Jie Chen 2020-12-15
10867900 Dummy metal with zigzagged edges Cheng-Hsien Hsieh, Chi-Hsi Wu, Chen-Hua Yu, Der-Chyang Yeh, Li-Han Hsu +1 more 2020-12-15
10867968 3DIC structure with protective structure and method of fabricating the same Ching-Jung Yang, Ming-Fa Chen 2020-12-15
10867879 Integrated circuit package and method Chen-Hua Yu, Sung-Feng Yeh, Ming-Fa Chen, Tzuan-Horng Liu 2020-12-15
10867896 Molding compound structure 2020-12-15
10861808 Bonding structure of dies with dangling bonds Ming-Fa Chen, Chih-Chia Hu 2020-12-08
10854565 Chip package structure with bump Wei-Yu Chen, Li-Hsien Huang, An-Jhih Su 2020-12-01
10854574 Forming metal bonds with recesses Ming-Fa Chen, Sung-Feng Yeh, Wen-Chih Chiou 2020-12-01