Issued Patents All Time
Showing 26–50 of 110 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11742220 | Integrated passive device package and methods of forming same | Shuo-Mao Chen, Jui-Pin Hung, Shin-Puu Jeng | 2023-08-29 |
| 11742310 | Method of manufacturing semiconductor device | Jing-Cheng Lin | 2023-08-29 |
| 11735572 | Integrated circuit package and method forming same | Shin-Puu Jeng, Shuo-Mao Chen | 2023-08-22 |
| 11728256 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shuo-Mao Chen, Shin-Puu Jeng | 2023-08-15 |
| 11670577 | Chip package with redistribution structure having multiple chips | Shin-Puu Jeng, Po-Hao Tsai, Po-Yao Chuang, Shuo-Mao Chen, Techi Wong | 2023-06-06 |
| 11610864 | Chip package structure and method of forming the same | Shuo-Mao Chen, Shin-Puu Jeng | 2023-03-21 |
| 11600597 | Semiconductor package structure | Shin-Puu Jeng | 2023-03-07 |
| 11532569 | Method for manufacturing semiconductor package structure | Jui-Pin Hung, Shuo-Mao Chen, Shin-Puu Jeng, De-Dui Liao | 2022-12-20 |
| 11508710 | Method of forming semiconductor device package | Po-Yao Lin, Cheng-Yi Hong, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh +1 more | 2022-11-22 |
| 11469208 | Method of manufacturing semiconductor package structure | Shin-Puu Jeng, Shuo-Mao Chen | 2022-10-11 |
| 11456257 | Semiconductor package with dual sides of metal routing | Shin-Puu Jeng, Shuo-Mao Chen, Hsien-Wen Liu, Po-Yao Chuang, Po-Yao Lin | 2022-09-27 |
| 11443993 | Chip package structure with cavity in interposer | Shin-Puu Jeng, Shuo-Mao Chen | 2022-09-13 |
| 11417620 | Semiconductor device encapsulated by molding material attached to redestribution layer | Shin-Puu Jeng, Shuo-Mao Chen | 2022-08-16 |
| 11404394 | Chip package structure with integrated device integrated beneath the semiconductor chip | Shin-Puu Jeng, Shuo-Mao Chen | 2022-08-02 |
| 11393746 | Reinforcing package using reinforcing patches | Chia-Kuei Hsu, Ming-Chih Yew, Po-Yao Lin, Shuo-Mao Chen, Shin-Puu Jeng | 2022-07-19 |
| 11387183 | Semiconductor package having a semiconductor device bonded to a circuit substrate through connection terminals and dummy conductors and method of manufacturing the same | Shin-Puu Jeng | 2022-07-12 |
| 11355474 | Semiconductor package and method manufacturing the same | Shin-Puu Jeng | 2022-06-07 |
| 11342306 | Multi-chip wafer level packages | Shuo-Mao Chen, Han-Hsiang Huang, Hsien-Wen Liu, Shin-Puu Jeng, Hsiao-Wen Lee | 2022-05-24 |
| 11342255 | Semiconductor structure and manufacturing method thereof | Shuo-Mao Chen, Shin-Puu Jeng | 2022-05-24 |
| 11335672 | Semiconductor structure and manufacturing method thereof | Hsiang-Tai Lu, Shuo-Mao Chen, Mill-Jer Wang, Chao-Hsiang Yang, Shin-Puu Jeng +4 more | 2022-05-17 |
| 11295957 | Package structure and method of manufacturing the same | Shuo-Mao Chen, Shin-Puu Jeng | 2022-04-05 |
| 11282759 | Chip package structure having warpage control and method of forming the same | Shin-Puu Jeng, Shuo-Mao Chen | 2022-03-22 |
| 11264300 | Package structure with lid and method for forming the same | Shin-Puu Jeng, Po-Yao Lin, Shuo-Mao Chen, Chin-Hua Wang | 2022-03-01 |
| 11251142 | Method of fabricating package structure | Chia-Hsiang Lin, Shuo-Mao Chen, Shin-Puu Jeng, Arunima Banerjee | 2022-02-15 |
| 11251054 | Integrated passive device package and methods of forming same | Shuo-Mao Chen, Jui-Pin Hung, Shin-Puu Jeng | 2022-02-15 |