Issued Patents All Time
Showing 451–475 of 498 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6245669 | High selectivity Si-rich SiON etch-stop layer | Chu-Yun Fu, Syun-Ming Jang | 2001-06-12 |
| 6242362 | Etch process for fabricating a vertical hard mask/conductive pattern profile to improve T-shaped profile for a silicon oxynitride hard mask | Jen-Cheng Liu, Huan-Just Lin, Yung-Kuan Hsaio | 2001-06-05 |
| 6242350 | Post gate etch cleaning process for self-aligned gate mosfets | Hun-Jan Tao, Yuan-Chang Huang | 2001-06-05 |
| 6225203 | PE-SiN spacer profile for C2 SAC isolation window | Jen-Cheng Liu, Jen-Shiang Leu | 2001-05-01 |
| 6211061 | Dual damascene process for carbon-based low-K materials | Chao-Cheng Chen, Ming-Huei Lui, Jen-Cheng Liu, Li-Chih Chao | 2001-04-03 |
| 6194128 | Method of dual damascene etching | Hun-Jan Tao, Chao-Cheng Chen | 2001-02-27 |
| 6183937 | Post photodevelopment isotropic radiation treatment method for forming patterned photoresist layer with attenuated linewidth | Hun-Jan Tao | 2001-02-06 |
| 6174818 | Method of patterning narrow gate electrode | Hun-Jan Tao, Huan-Just Lin, Hung-Chang Hsieh, Chu-Yun Fu, Ying-Ying Wang +1 more | 2001-01-16 |
| 6165881 | Method of forming salicide poly gate with thin gate oxide and ultra narrow gate width | Hun-Jan Tao | 2000-12-26 |
| 6156660 | Method of planarization using dummy leads | Chi-Wen Liu, Jing-Meng Liu, Tsu Shih | 2000-12-05 |
| 6143670 | Method to improve adhesion between low dielectric constant layer and silicon containing dielectric layer | Yao-Yi Cheng, Syun-Ming Jang, Chung-Shi Liu | 2000-11-07 |
| 6129091 | Method for cleaning silicon wafers with deep trenches | Kuei-Ying Lee, Hun-Jan Tao | 2000-10-10 |
| 6103630 | Adding SF.sub.6 gas to improve metal undercut for hardmask metal etching | Yu-Hua Lee | 2000-08-15 |
| 6093619 | Method to form trench-free buried contact in process with STI technology | Kuo-Ching Huang, Tse-Liang Ying | 2000-07-25 |
| 6083815 | Method of gate etching with thin gate oxide | Shu-Chih Yang, Chao-Chey Chen | 2000-07-04 |
| 6063711 | High selectivity etching stop layer for damascene process | Li-Chih Chao, Chu-Yun Fu, Jhon Jhy Liaw | 2000-05-16 |
| 6043163 | HCL in overetch with hard mask to improve metal line etching profile | Chao-Cheng Chen, Hun-Jan Tao | 2000-03-28 |
| 6040248 | Chemistry for etching organic low-k materials | Chao-Cheng Chen, Ming-Hsin Huang, Hun-Jan Tao | 2000-03-21 |
| 6037266 | Method for patterning a polysilicon gate with a thin gate oxide in a polysilicon etcher | Hun-Jan Tao | 2000-03-14 |
| 6025273 | Method for etching reliable small contact holes with improved profiles for semiconductor integrated circuits using a carbon doped hard mask | Chao-Cheng Chen, Hun-Jan Tao | 2000-02-15 |
| 6015757 | Method of oxide etching with high selectivity to silicon nitride by using polysilicon layer | Kuei-Ying Lee, Hun-Jan Tao | 2000-01-18 |
| 6015735 | Method for forming a multi-anchor DRAM capacitor and capacitor formed | Shau-Lin Shue, Hun-Jan Tao, Jenn Ming Huang | 2000-01-18 |
| 5994229 | Achievement of top rounding in shallow trench etch | Chao-Cheng Chen | 1999-11-30 |
| 5981398 | Hard mask method for forming chlorine containing plasma etched layer | Chao-Cheng Chen, Hun-Jan Tao | 1999-11-09 |
| 5968278 | High aspect ratio contact | Bao-Ru Young, Wen-Chuan Chiang | 1999-10-19 |