Issued Patents All Time
Showing 401–425 of 498 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7297598 | Process for erase improvement in a non-volatile memory device | Shih-Chang Liu, Chi-Hsin Lo, Shih-Chi Fu, Chia-Ta Hsieh, Wen-Ting Chu | 2007-11-20 |
| 7253470 | Floating gate with unique profile by means of undercutting for split-gate flash memory device | Shih-Chang Liu, Chi-Hsin Lo, Chi-Wei Ho | 2007-08-07 |
| 7202130 | Spacer for a split gate flash memory cell and a memory cell employing the same | Yuan-Hung Liu, Chih-Ta Wu, Yeur-Luen Tu, Chi-Hsin Lo | 2007-04-10 |
| 7199001 | Method of forming MIM capacitor electrodes | Chih-Ta Wu, Kuo-Yin Lin, Tsung-Hsun Huang, Chung-Yi Yu, Lan-Lin Chao +2 more | 2007-04-03 |
| 7189957 | Methods to improve photonic performances of photo-sensitive integrated circuits | Shih-Chi Fu, Yuan-Hung Liu, Kuo-Yin Lin, Feng-Jia Shiu, Ching-Sen Kuo +1 more | 2007-03-13 |
| 7172908 | Magnetic memory cells and manufacturing methods | Yuan-Hung Liu, Chih-Ta Wu, Lan-Lin Chao, Yeur-Luen Tu, Wen-Chin Lin | 2007-02-06 |
| 7169713 | Atomic layer deposition (ALD) method with enhanced deposition rate | Chih-Ta Wu, Kuo-Yin Lin | 2007-01-30 |
| 7161204 | DRAM capacitor structure with increased electrode support for preventing process damage and exposed electrode surface for increasing capacitor area | Chun-Chieh Lin, Lan-Lin Chao, Fu-Liang Yang, Chia-Hui Lin, Chanming Hu | 2007-01-09 |
| 7153755 | Process to improve programming of memory cells | Shih-Chang Liu, Wen-Ting Chu, Chien-Ming Ku, Chi-Hsin Lo, Chia-Ta Hsieh | 2006-12-26 |
| 7144773 | Method for preventing trenching in fabricating split gate flash devices | Shih-Chang Liu, Chi-Hsin Lo, Gwo-Yuh Shiau | 2006-12-05 |
| 7122424 | Method for making improved bottom electrodes for metal-insulator-metal crown capacitors | Yeur-Luen Tu, Yuan-Hung Liu, Chi-Hsin Lo | 2006-10-17 |
| 6926011 | Post etching treatment process for high density oxide etcher | Bao-Ru Young | 2005-08-09 |
| 6921695 | Etching method for forming a square cornered polysilicon wordline electrode | Hsiu Ouyang, Chi-Hsin Lo, Chen-Ming Huang, Chia-Ta Hsieh | 2005-07-26 |
| 6889697 | Post etching treatment process for high density oxide etcher | Bao-Ru Young | 2005-05-10 |
| 6881622 | Aqueous ammonium hydroxide amorphous silicon etch method for forming microelectronic capacitor structure | Chi-Hsing Yu, Chih-Yang Pai | 2005-04-19 |
| 6875655 | Method of forming DRAM capacitors with protected outside crown surface for more robust structures | Chun-Chieh Lin, Lan-Lin Chao, Chia-Hui Lin, Fu-Liang Yang, Chanming Hu | 2005-04-05 |
| 6869837 | Methods of fabricating a word-line spacer for wide over-etching window on outside diameter (OD) and strong fence | Yuan-Hung Liu, Yeur-Luen Tu, Chin-Ta Wu, Tsung-Hsun Huang, Hsiu Ouyang +1 more | 2005-03-22 |
| 6860275 | Post etching treatment process for high density oxide etcher | Bao-Ru Young | 2005-03-01 |
| 6855602 | Method for forming a box shaped polygate | Yi-Shing Chang, Yeur-Luen Tu, Wen-Ting Chu | 2005-02-15 |
| 6764967 | Method for forming low thermal budget sacrificial oxides | Vincent Pai, Kuo-Chi Tu, Chung-Wei Chang, Chun-Yao Chen | 2004-07-20 |
| 6743732 | Organic low K dielectric etch with NH3 chemistry | Li-Te Lin, Li-Chih Chao | 2004-06-01 |
| 6656847 | Method for etching silicon nitride selective to titanium silicide | Huan-Just Lin | 2003-12-02 |
| 6624018 | Method of fabricating a DRAM device featuring alternate fin type capacitor structures | Chih-Hsing Yu, Chih-Yang Pai | 2003-09-23 |
| 6620631 | Plasma etch method for forming patterned layer with enhanced critical dimension (CD) control | Hun-Jan Tao, Anthony Yen | 2003-09-16 |
| 6579791 | Method to form dual damascene structure | Yeur-Luen Tu, Min-hwa Chi | 2003-06-17 |