Issued Patents All Time
Showing 476–498 of 498 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5962346 | Fluorine-doped silicate glass hard mask to improve metal line etching profile | Shau-Lin Shue | 1999-10-05 |
| 5930644 | Method of forming a shallow trench isolation using oxide slope etching | Kuei-Ying Lee, Hun-Jan Tao | 1999-07-27 |
| 5925575 | Dry etching endpoint procedure to protect against photolithographic misalignments | Hun-Jan Tao | 1999-07-20 |
| 5922516 | Bi-layer silylation process | Chen-Hua Yu | 1999-07-13 |
| 5904566 | Reactive ion etch method for forming vias through nitrogenated silicon oxide layers | Hun-Jan Tao | 1999-05-18 |
| 5899748 | Method for anchoring via/contact in semiconductor devices and devices formed | Hun-Jan Tao | 1999-05-04 |
| 5880005 | Method for forming a tapered profile insulator shape | Hun-Jan Tao | 1999-03-09 |
| 5872061 | Plasma etch method for forming residue free fluorine containing plasma etched layers | Shing-Long Lee, So Wein Kuo | 1999-02-16 |
| 5871658 | Optical emisson spectroscopy (OES) method for monitoring and controlling plasma etch process when forming patterned layers | Hun-Jan Tao, Chen-Hua Yu | 1999-02-16 |
| 5866481 | Selective partial curing of spin-on-glass by ultraviolet radiation to protect integrated circuit dice near the wafer edge | Pin-Nan Tseng, Sung-Mu Hsu | 1999-02-02 |
| 5858838 | Method for increasing DRAM capacitance via use of a roughened surface bottom capacitor plate | Chen-Jong Wang | 1999-01-12 |
| 5858621 | Bi-layer silylation process using anti-reflective-coatings (ARC) for making distortion-free submicrometer photoresist patterns | Chen-Hua Yu | 1999-01-12 |
| 5856227 | Method of fabricating a narrow polycide gate structure on an ultra-thin gate insulator layer | Chen-Hua Yu | 1999-01-05 |
| 5837599 | Wafer surface modification for improved electrostatic chucking efficiency | Hun-Jan Tao | 1998-11-17 |
| 5833817 | Method for improving conformity and contact bottom coverage of sputtered titanium nitride barrier layers | Ying Wang, Chen-Hua Yu | 1998-11-10 |
| 5753418 | 0.3 Micron aperture width patterning process | Yuan-Chang Huang, Chen-Hua Yu | 1998-05-19 |
| 5728619 | Selective reactive Ion etch (RIE) method for forming a narrow line-width high aspect ratio via through an integrated circuit layer | Chen-Hua Yu | 1998-03-17 |
| 5688719 | Method for plasma hardening of patterned photoresist layers | Sung-Mu Hsu | 1997-11-18 |
| 5674775 | Isolation trench with a rounded top edge using an etch buffer layer | Chin-Hsiung Ho, Cheng-Kai Liu, Chaochieh Tsai | 1997-10-07 |
| 5670426 | Method for reducing contact resistance | So-Wen Kuo | 1997-09-23 |
| 5620817 | Fabrication of self-aligned attenuated rim phase shift mask | Jung-Hsien Hsu, Chung-Kuang Lee | 1997-04-15 |
| 5575706 | Chemical/mechanical planarization (CMP) apparatus and polish method | Pin-Nan Tseng | 1996-11-19 |
| 5486266 | Method for improving the adhesion of a deposited metal layer | Tien-Chen Chang | 1996-01-23 |