Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424559 | Package with a substrate comprising embedded escape interconnects and surface escape interconnects | Hong Bok We, Michelle Yejin Kim | 2025-09-23 |
| 12362269 | Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods | Michelle Yejin Kim, Joan Rey Villarba BUOT, Ching-Liou Huang | 2025-07-15 |
| 12354935 | Integrated circuit (IC) package substrate with embedded trace substrate (ETS) layer on a substrate, and related fabrication methods | Chin-Kwan Kim, Joonsuk Park | 2025-07-08 |
| 11791320 | Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods | Hong Bok We, Joan Rey Villarba BUOT, Michelle Yejin Kim, Aniket PATIL | 2023-10-17 |
| 11776888 | Package with a substrate comprising protruding pad interconnects | Hong Bok We, Chin-Kwan Kim, Milind Shah | 2023-10-03 |
| 11764076 | Semi-embedded trace structure with partially buried traces | Joan Rey Villarba BUOT, Terence Cheung | 2023-09-19 |
| 11676905 | Integrated circuit (IC) package with stacked die wire bond connections, and related methods | Michelle Yejin Kim, Joan Rey Villarba BUOT, Jialing Tong | 2023-06-13 |
| 11637057 | Uniform via pad structure having covered traces between partially covered pads | Chin-Kwan Kim, Aniket PATIL, Jaehyun Yeon | 2023-04-25 |
| 11605595 | Packages with local high-density routing region embedded within an insulating layer | Aniket PATIL, Hong Bok We | 2023-03-14 |
| 11552023 | Passive component embedded in an embedded trace substrate (ETS) | Brigham NAVAJA, Marcus HSU, Terence Cheung | 2023-01-10 |
| 11552015 | Substrate comprising a high-density interconnect portion embedded in a core layer | Aniket PATIL, Hong Bok We | 2023-01-10 |
| 11545439 | Package comprising an integrated device coupled to a substrate through a cavity | Aniket PATIL, Hong Bok We | 2023-01-03 |
| 11545435 | Double sided embedded trace substrate | Zhijie Wang, Hong Bok We | 2023-01-03 |
| 11527498 | Bump pad structure | Michelle Yejin Kim, Marcus HSU | 2022-12-13 |
| 11444019 | Package comprising a substrate with interconnect routing over solder resist layer and an integrated device coupled to the substrate and method for manufacturing the package | Aniket PATIL, Hong Bok We | 2022-09-13 |
| 11437335 | Integrated circuit (IC) packages employing a thermal conductive package substrate with die region split, and related fabrication methods | Aniket PATIL, Bohan Yan, Dongming He | 2022-09-06 |
| 11404343 | Package comprising a substrate configured as a heat spreader | David Fraser Rae, John Holmes, Marcus HSU, Avantika Sodhi | 2022-08-02 |
| 11342254 | Multi-dielectric structure in two-layer embedded trace substrate | Joan Rey Villarba BUOT, Joonsuk Park, Karthikeyan Dhandapani | 2022-05-24 |
| 11075260 | Substrate comprising recessed interconnects and a surface mounted passive component | Chin-Kwan Kim, Hong Bok We, Jaehyun Yeon | 2021-07-27 |
| 10971455 | Ground shield plane for ball grid array (BGA) package | Aniket PATIL, Zhijie Wang, Ming Yi | 2021-04-06 |
| 10879158 | Split conductive pad for device terminal | Aniket PATIL, Hong Bok We, Zhijie Wang | 2020-12-29 |
| 10804195 | High density embedded interconnects in substrate | Marcus HSU, Brigham NAVAJA, Houssam Jomaa | 2020-10-13 |
| 10679919 | High thermal release interposer | Zhijie Wang, Bohan Yan | 2020-06-09 |
| 10651160 | Low profile integrated package | Houssam Jomaa, Christopher Bahr, Layal Rouhana | 2020-05-12 |
| 10622292 | High density interconnects in an embedded trace substrate (ETS) comprising a core layer | Houssam Jomaa | 2020-04-14 |