| 12362269 |
Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods |
Michelle Yejin Kim, Kuiwon Kang, Joan Rey Villarba BUOT |
2025-07-15 |
| 11437307 |
Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction |
Abdolreza Langari, Yuan LI, Shrestha Ganguly, Terence Cheung, Hui Wang |
2022-09-06 |
| 10916494 |
Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction |
Abdolreza Langari, Yuan LI, Shrestha Ganguly, Terence Cheung, Hui Wang |
2021-02-09 |
| 10312210 |
Semiconductor package |
Ta-Jen Yu |
2019-06-04 |
| 9972593 |
Semiconductor package |
Ta-Jen Yu |
2018-05-15 |
| 9659893 |
Semiconductor package |
Tzu-Hung Lin, Thomas Matthew Gregorich |
2017-05-23 |
| 9640505 |
Semiconductor package with trace covered by solder resist |
Tzu-Hung Lin, Thomas Matthew Gregorich |
2017-05-02 |
| 9548271 |
Semiconductor package |
Kuei-Ti Chan, Tzu-Hung Lin |
2017-01-17 |
| 9209148 |
Semiconductor package |
Kuei-Ti Chan, Tzu-Hung Lin |
2015-12-08 |
| 9142526 |
Semiconductor package with solder resist capped trace to prevent underfill delamination |
Tzu-Hung Lin, Thomas Matthew Gregorich |
2015-09-22 |
| 8987897 |
Semiconductor package |
Kuei-Ti Chan, Tzu-Hung Lin |
2015-03-24 |
| 8633588 |
Semiconductor package |
Tzu-Hung Lin, Thomas Matthew Gregorich |
2014-01-21 |
| 8502377 |
Package substrate for bump on trace interconnection |
Tzu-Hung Lin, Thomas Matthew Gregorich |
2013-08-06 |