JB

Joan Rey Villarba BUOT

QU Qualcomm: 19 patents #1,160 of 12,104Top 10%
IN Intel: 3 patents #10,349 of 30,777Top 35%
📍 Escondido, CA: #82 of 1,330 inventorsTop 7%
🗺 California: #25,620 of 386,348 inventorsTop 7%
Overall (All Time): #188,339 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDate
12381174 Integrated circuit (IC) packages employing wire bond channel over package substrate, and related fabrication methods Aniket PATIL, Hong Bok We 2025-08-05
12362269 Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods Michelle Yejin Kim, Kuiwon Kang, Ching-Liou Huang 2025-07-15
12230552 Recess structure for padless stack via Hong Bok We, Aniket PATIL 2025-02-18
12100645 Integrated circuit (IC) package employing added metal for embedded metal traces in ETS-based substrate for reduced signal path impedance, and related fabrication methods Aniket PATIL, Hong Bok We 2024-09-24
12021063 Circular bond finger pad Aniket PATIL, Zhijie Wang, Hong Bok We 2024-06-25
11955409 Substrate comprising interconnects in a core layer configured for skew matching Aniket PATIL, Hong Bok We 2024-04-09
11832391 Terminal connection routing and method the same Aniket PATIL, Hong Bok We 2023-11-28
11804645 Multi-sided antenna module employing antennas on multiple sides of a package substrate for enhanced antenna coverage, and related fabrication methods Hong Bok We, Aniket PATIL 2023-10-31
11791276 Package comprising passive component between substrates for improved power distribution network (PDN) performance Aniket PATIL, Hong Bok We 2023-10-17
11791320 Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods Hong Bok We, Michelle Yejin Kim, Kuiwon Kang, Aniket PATIL 2023-10-17
11764076 Semi-embedded trace structure with partially buried traces Kuiwon Kang, Terence Cheung 2023-09-19
11676905 Integrated circuit (IC) package with stacked die wire bond connections, and related methods Kuiwon Kang, Michelle Yejin Kim, Jialing Tong 2023-06-13
11581251 Package comprising inter-substrate gradient interconnect structure Aniket PATIL, Zhijie Wang, Hong Bok We 2023-02-14
11562962 Package comprising a substrate and interconnect device configured for diagonal routing Aniket PATIL, Zhijie Wang, Hong Bok We 2023-01-24
11342254 Multi-dielectric structure in two-layer embedded trace substrate Kuiwon Kang, Joonsuk Park, Karthikeyan Dhandapani 2022-05-24
11322490 Modular capacitor array Zhijie Wang 2022-05-03
11302656 Passive device orientation in core for improved power delivery in package Hong Bok We, Aniket PATIL, Zhijie Wang 2022-04-12
11296022 Package and substrate comprising interconnects with semi-circular planar shape and/or trapezoid planar shape Aniket PATIL, Hong Bok We 2022-04-05
9460980 Systems, apparatus, and methods for heat dissipation Sun Woong Yun, Rajneesh Kumar, Houssam Jomaa 2016-10-04
8317107 Chip-spacer integrated radio frequency ID tags, methods of making same, and systems containing same Christian Orias 2012-11-27
8093717 Microstrip spacer for stacked chip scale packages, methods of making same, methods of operating same, and systems containing same Christian Orias 2012-01-10
7262492 Semiconducting device that includes wirebonds Ruel Pieda, Carmelito Libay 2007-08-28