WF

Warren M. Farnworth

Micron: 760 patents #3 of 6,345Top 1%
AI Aptina Imaging: 7 patents #36 of 332Top 15%
RR Round Rock Research: 3 patents #66 of 239Top 30%
📍 Nampa, ID: #1 of 306 inventorsTop 1%
🗺 Idaho: #2 of 8,810 inventorsTop 1%
Overall (All Time): #113 of 4,157,543Top 1%
778
Patents All Time

Issued Patents All Time

Showing 526–550 of 778 patents

Patent #TitleCo-InventorsDate
6295209 Semiconductor device including combed bond pad opening, assemblies and methods Walter L. Moden, Larry D. Kinsman 2001-09-25
6292009 Reduced terminal testing system Leland R. Nevill, Raymond J. Beffa, Eugene H. Cloud 2001-09-18
6291894 Method and apparatus for a semiconductor package for vertical surface mounting Larry D. Kinsman, Walter L. Moden 2001-09-18
6287942 Hermetic chip and method of manufacture Salman Akram, Alan G. Wood 2001-09-11
6284573 Wafer level fabrication and assembly of chip scale packages 2001-09-04
6285203 Test system having alignment member for aligning semiconductor components Salman Akram, Michael E. Hess, David R. Hembree 2001-09-04
6285204 Method for testing semiconductor packages using oxide penetrating test contacts 2001-09-04
6285201 Method and apparatus for capacitively testing a semiconductor die Salman Akram 2001-09-04
6278286 Interconnect and system for making temporary electrical connections to semiconductor components Salman Akram 2001-08-21
6275052 Probe card and testing method for semiconductor wafers David R. Hembree, Salman Akram, Alan G. Wood, C. Patrick Doherty, Andrew J. Krivy 2001-08-14
6271056 Stacked semiconductor package and method of fabrication Alan G. Wood, Mike Brooks 2001-08-07
6268655 Semiconductor device including edge bond pads and methods Larry D. Kinsman, Walter L. Moden 2001-07-31
6265773 Vertically mountable and alignable semiconductor device, assembly, and methods Larry D. Kinsman, Walter L. Moden 2001-07-24
6265245 Compliant interconnect for testing a semiconductor die Salman Akram, Alan G. Wood 2001-07-24
6261854 Interconnect with pressure sensing mechanism for testing semiconductor wafers Salman Akram 2001-07-17
6259036 Method for fabricating electronic assemblies using semi-cured conductive elastomeric bumps 2001-07-10
6258609 Method and system for making known good semiconductor dice Alan G. Wood 2001-07-10
6255840 Semiconductor package with wire bond protective member David R. Hembree, Salman Akram, Derek Gochnour 2001-07-03
6255833 Method for testing semiconductor dice and chip scale packages Salman Akram, Alan G. Wood, David R. Hembree 2001-07-03
6252302 Heat transfer material for an improved die edge contacting socket 2001-06-26
6248611 LOC semiconductor assembled with room temperature adhesive Ford B. Grigg 2001-06-19
6246245 Probe card, test method and test system for semiconductor wafers Salman Akram, C. Patrick Doherty, David R. Hembree 2001-06-12
6242103 Method for producing laminated film/metal structures David R. Hembree 2001-06-05
6240535 Device and method for testing integrated circuit dice in an integrated circuit module James M. Wark, Eric S. Nelson, Kevin G. Duesman 2001-05-29
6239590 Calibration target for calibrating semiconductor wafer test systems Andrew J. Krivy, David R. Hembree, Salman Akram, James M. Wark, John O. Jacobson 2001-05-29