Issued Patents All Time
Showing 26–50 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10847382 | Solder bond site including an opening with discontinuous profile | Dale Arnold | 2020-11-24 |
| 10770430 | Package integration for memory devices | Myongseob Kim, Henley Liu, Cheang-Whang Chang | 2020-09-08 |
| 10748878 | Semiconductor device assembly with heat transfer structure formed from semiconductor material | Sameer S. Vadhavkar, James M. Derderian | 2020-08-18 |
| 10741460 | Methods for forming interconnect assemblies with probed bond pads | Owen R. Fay, Kyle K. Kirby, Luke England | 2020-08-11 |
| 10741468 | Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods | Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li +3 more | 2020-08-11 |
| 10692733 | Uniform back side exposure of through-silicon vias | Wayne H. Huang | 2020-06-23 |
| 10651155 | Thermal pads between stacked semiconductor dies and associated systems and methods | Michel Koopmans | 2020-05-12 |
| 10593638 | Methods of interconnect for high density 2.5D and 3D integration | Suresh Ramalingam, Henley Liu | 2020-03-17 |
| 10580746 | Bonding pads with thermal pathways | James M. Derderian, Sameer S. Vadhavkar, Jian Li | 2020-03-03 |
| 10573612 | Bonding pads with thermal pathways | James M. Derderian, Sameer S. Vadhavkar, Jian Li | 2020-02-25 |
| 10559551 | Semiconductor device assembly with heat transfer structure formed from semiconductor material | Sameer S. Vadhavkar, James M. Derderian | 2020-02-11 |
| 10529645 | Methods and apparatus for thermal interface material (TIM) bond line thickness (BLT) reduction and TIM adhesion enhancement for efficient thermal management | Henley Liu, Tien-Yu Lee, Gamal Refai-Ahmed, Myongseob Kim, Ferdinand F. Fernandez +2 more | 2020-01-07 |
| 10527670 | Testing system for lid-less integrated circuit packages | Gamal Refai-Ahmed, Ivor G. Barber, Suresh Ramalingam, Tien-Yu Lee, Henley Liu +2 more | 2020-01-07 |
| 10481200 | Semiconductor device test apparatuses comprising at least one test site having an array of pockets | Michel Koopmans, James M. Derderian | 2019-11-19 |
| 10424531 | Method for manufacturing a semiconductor device assembly with through-mold cooling channel formed in encapsulant | Bradley R. Bitz, Xiao Li | 2019-09-24 |
| 10410879 | Uniform back side exposure of through-silicon vias | Wayne H. Huang | 2019-09-10 |
| 10410882 | Solder bond site including an opening with discontinuous profile | Dale Arnold | 2019-09-10 |
| 10403591 | Chip package assembly with enhanced interconnects and method for fabricating the same | — | 2019-09-03 |
| 10319606 | Chip package assembly with enhanced interconnects and method for fabricating the same | Tien-Yu Lee, Henley Liu, Ivor G. Barber, Suresh Ramalingam | 2019-06-11 |
| 10297577 | Semiconductor device assembly with heat transfer structure formed from semiconductor material | Sameer S. Vadhavkar, James M. Derderian | 2019-05-21 |
| 10262922 | Semiconductor device having through-silicon-via and methods of forming the same | Wayne H. Huang | 2019-04-16 |
| 10256216 | Interconnect structures with intermetallic palladium joints and associated systems and methods | — | 2019-04-09 |
| 10236229 | Stacked silicon package assembly having conformal lid | — | 2019-03-19 |
| 10224313 | Interconnect structures with intermetallic palladium joints and associated systems and methods | — | 2019-03-05 |
| 10170389 | Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods | Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li +3 more | 2019-01-01 |