IB

Ivor G. Barber

Lsi Logic: 10 patents #161 of 1,957Top 9%
AM AMD: 8 patents #1,491 of 9,279Top 20%
LS Lsi: 2 patents #602 of 1,740Top 35%
📍 Los Gatos, CA: #402 of 2,986 inventorsTop 15%
🗺 California: #27,156 of 386,348 inventorsTop 8%
Overall (All Time): #206,730 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDate
11393697 Semiconductor chip gettering Rahul Agarwal, Milind S. Bhagavat, Venkatachalam Valliappan, Yuen Ting Cheng, Guan Sin Chok 2022-07-19
10825692 Semiconductor chip gettering Rahul Agarwal, Milind S. Bhagavat, Venkatachalam Valliappan, Yuen Ting Cheng, Guan Sin Chok 2020-11-03
10527670 Testing system for lid-less integrated circuit packages Gamal Refai-Ahmed, Suresh Ramalingam, Jaspreet S. Gandhi, Tien-Yu Lee, Henley Liu +2 more 2020-01-07
10529645 Methods and apparatus for thermal interface material (TIM) bond line thickness (BLT) reduction and TIM adhesion enhancement for efficient thermal management Jaspreet S. Gandhi, Henley Liu, Tien-Yu Lee, Gamal Refai-Ahmed, Myongseob Kim +2 more 2020-01-07
10510721 Molded chip combination Milind S. Bhagavat, Lei Fu, Chia-Ken Leong, Rahul Agarwal 2019-12-17
10319606 Chip package assembly with enhanced interconnects and method for fabricating the same Jaspreet S. Gandhi, Tien-Yu Lee, Henley Liu, Suresh Ramalingam 2019-06-11
10096502 Method and apparatus for assembling and testing a multi-integrated circuit package Gamal Refai-Ahmed, Suresh Ramalingam, Mohsen H. Mardi, Tien-Yu Lee, Cheang-Whang Chang +1 more 2018-10-09
10043730 Stacked silicon package assembly having an enhanced lid Gamal Refai-Ahmed, Tien-Yu Lee, Ferdinand F. Fernandez, Suresh Ramalingam, Inderjit Singh +1 more 2018-08-07
7829424 Package configuration and manufacturing method enabling the addition of decoupling capacitors to standard package designs Leah M. Miller, Aritharan Thurairajaratnam 2010-11-09
7508062 Package configuration and manufacturing method enabling the addition of decoupling capacitors to standard package designs Leah M. Miller, Aritharan Thurairajaratnam 2009-03-24
7173328 Integrated circuit package and method having wire-bonded intra-die electrical connections 2007-02-06
6943446 Via construction for structural support John McCormick, Kumar Nagarajan 2005-09-13
6673708 Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill Zafer Kutlu 2004-01-06
6590292 Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill Zafer Kutlu 2003-07-08
5895968 Semiconductor device assembly with minimized bond finger connections 1999-04-20
5801072 Method of packaging integrated circuits 1998-09-01
5741726 Semiconductor device assembly with minimized bond finger connections 1998-04-21
5723369 Method of flip chip assembly 1998-03-03
5700723 Method of packaging an integrated circuit 1997-12-23
5604161 Semiconductor device assembly with minimized bond finger connections 1997-02-18
5545923 Semiconductor device assembly with minimized bond finger connections 1996-08-13