TG

Tahir Ghani

IN Intel: 469 patents #7 of 30,777Top 1%
SO Sony: 6 patents #6,793 of 25,231Top 30%
TR Tahoe Research: 4 patents #1 of 215Top 1%
DP Daedalus Prime: 3 patents #3 of 21Top 15%
📍 Portland, OR: #4 of 9,213 inventorsTop 1%
🗺 Oregon: #10 of 28,073 inventorsTop 1%
Overall (All Time): #420 of 4,157,543Top 1%
482
Patents All Time

Issued Patents All Time

Showing 426–450 of 482 patents

Patent #TitleCo-InventorsDate
9484447 Integration methods to fabricate internal spacers for nanowire devices Seiyon Kim, Kelin J. Kuhn, Anand S. Murthy, Mark Armstrong, Rafael Rios +2 more 2016-11-01
9466565 Self-aligned contacts Mark Bohr, Nadia M. Rahhai-Orabi, Subhash M. Joshi, Joseph M. Steigerwald, Jason W. Klaus +2 more 2016-10-11
9461143 Gate contact structure over active gate and method to fabricate same Abhijit Jayant Pethe, Mark Bohr, Clair Webb, Harry Gomez, Annalisa Cappellani 2016-10-04
9443980 Pulsed laser anneal process for transistors with partial melt of a raised source-drain Jacob Jensen, Mark Liu, Harold W. Kennel, Robert James 2016-09-13
9397102 III-V layers for N-type and P-type MOS source-drain contacts Glenn A. Glass, Anand S. Murthy 2016-07-19
9349810 Selective germanium P-contact metalization through trench Glenn A. Glass, Anand S. Murthy 2016-05-24
9240322 Method for forming superactive deactivation-resistant junction with laser anneal and multiple implants Jacob Jensen, Harold W. Kennel, Robert James, Mark Liu 2016-01-19
9224735 Self-aligned contact metallization for reduced contact resistance Glenn A. Glass, Anand S. Murthy 2015-12-29
9224810 CMOS nanowire structure Seiyon Kim, Kelin J. Kuhn, Anand S. Murthy, Annalisa Cappellani, Stephen M. Cea +2 more 2015-12-29
9219155 Multi-threshold voltage devices and associated techniques and configurations Joseph M. Steigerwald, Jenny Hu, Ian R. Post 2015-12-22
9196704 Selective laser annealing process for buried regions in a MOS device Jacob Jensen, Mark Liu, Harold W. Kennel, Robert James 2015-11-24
9184294 High mobility strained channels for fin-based transistors Stephen M. Cea, Anand S. Murthy, Glenn A. Glass, Daniel B. Aubertine, Jack T. Kavalieros +1 more 2015-11-10
9166004 Semiconductor device contacts Michael Haverty, Sadasivan Shankar, Seongjun Park 2015-10-20
9153583 III-V layers for N-type and P-type MOS source-drain contacts Glenn A. Glass, Anand S. Murthy 2015-10-06
9117791 Selective germanium P-contact metalization through trench Glenn A. Glass, Anand S. Murthy 2015-08-25
9093513 Self-aligned contacts Mark Bohr, Nadia M. Rahhal-Orabi, Subhash M. Joshi, Joseph M. Steigerwald, Jason W. Klaus +2 more 2015-07-28
9059024 Self-aligned contact metallization for reduced contact resistance Glenn A. Glass, Anand S. Murthy 2015-06-16
9054178 Self-aligned contacts Mark Bohr, Nadia M. Rahhai-Orabi, Subhash M. Joshi, Joseph M. Steigerwald, Jason W. Klaus +2 more 2015-06-09
9048260 Method of forming a semiconductor device with tall fins and using hard mask etch stops Ritesh Jhaveri, Bernard Sell 2015-06-02
9041146 Logic chip including embedded magnetic tunnel junctions Kevin J. Lee, Joseph M. Steigerwald, John H. Epple, Yih Wang 2015-05-26
9029221 Semiconductor devices having three-dimensional bodies with modulated heights Annalisa Cappellani, Kelin J. Kuhn, Rafael Rios, Aura Cecilia Davila Latorre 2015-05-12
9006069 Pulsed laser anneal process for transistors with partial melt of a raised source-drain Jacob Jensen, Mark Liu, Harold W. Kennel, Robert James 2015-04-14
8994104 Contact resistance reduction employing germanium overlayer pre-contact metalization Glenn A. Glass, Anand S. Murthy 2015-03-31
8963579 Spin torque magnetic integrated circuits and devices therefor Dmitri E. Nikonov, George I. Bourianoff 2015-02-24
8901537 Transistors with high concentration of boron doped germanium Anand S. Murthy, Glenn A. Glass, Ravi Pillarisetty, Niloy Mukherjee, Jack T. Kavalieros +3 more 2014-12-02