Issued Patents All Time
Showing 25 most recent of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12394158 | Content playback based on a path | Allessandra E. McGinnis, Connor A. Smith, Jack R. Dashwood, Luis R. Deliz Centeno | 2025-08-19 |
| 12113948 | Systems and methods of managing spatial groups in multi-user communication sessions | Connor A. Smith, Willem MATTELAER, Joseph P. Cerra | 2024-10-08 |
| 12099695 | Systems and methods of managing spatial groups in multi-user communication sessions | Connor A. Smith, Willem MATTELAER, Joseph P. Cerra | 2024-09-24 |
| 12101197 | Temporarily suspending spatial constraints | Connor A. Smith, Luis R. Deliz Centeno | 2024-09-24 |
| 11989404 | Time-based visualization of content anchored in time | Allessandra E. McGinnis, Luis R. Deliz Centeno | 2024-05-21 |
| 11620653 | Systems and methods for configuring and implementing a malicious account testing machine learning model in a machine learning-based digital threat mitigation platform | Wei Liu, Hui Wang, Rishabh Kothari, Helen Marushchenko | 2023-04-04 |
| 11469268 | Damascene-based approaches for embedding spin hall MTJ devices into a logic processor and the resulting structures | Yih Wang | 2022-10-11 |
| 11429974 | Systems and methods for configuring and implementing a card testing machine learning model in a machine learning-based digital threat mitigation platform | Wei Liu, Hui Wang, Rishabh Kothari, Helen Marushchenko | 2022-08-30 |
| 11393873 | Approaches for embedding spin hall MTJ devices into a logic processor and the resulting structures | Yih Wang | 2022-07-19 |
| 11037896 | Method and apparatus for forming backside die planar devices and saw filter | Ruchir Saraswat, Uwe Zillmann, Nicholas P. Cowley, Richard J. Goldman | 2021-06-15 |
| 10811595 | Techniques for forming logic including integrated spin-transfer torque magnetoresistive random-access memory | Oleg Golonzka, Tahir Ghani, Ruth A. Brain, Yih Wang | 2020-10-20 |
| 10790263 | Integrated circuit die having backside passive components and methods associated therewith | — | 2020-09-29 |
| 10644064 | Logic chip including embedded magnetic tunnel junctions | Tahir Ghani, Joseph M. Steigerwald, John H. Epple, Yih Wang | 2020-05-05 |
| 10455308 | Die with integrated microphone device using through-silicon vias (TSVs) | Ruchir Saraswat, Uwe Zillmann, Valluri Rao, Tor Lund-Larsen, Nicholas P. Cowley | 2019-10-22 |
| 10290598 | Method and apparatus for forming backside die planar devices and saw filter | Ruchir Saraswat, Uwe Zillmann, Nicholas P. Cowley, Richard J. Goldman | 2019-05-14 |
| 10224309 | Integrated circuit die having backside passive components and methods associated therewith | — | 2019-03-05 |
| 9997563 | Logic chip including embedded magnetic tunnel junctions | Tahir Ghani, Joseph M. Steigerwald, John H. Epple, Yih Wang | 2018-06-12 |
| 9911689 | Through-body-via isolated coaxial capacitor and techniques for forming same | Ruchir Saraswat, Uwe Zillmann, Nicholas P. Cowley, Andre Schaefer, Rinkle Jain +1 more | 2018-03-06 |
| 9852964 | Through-body via formation techniques | — | 2017-12-26 |
| 9721886 | Preservation of fine pitch redistribution lines | Hiten Kothari, Wayne M. Lytle | 2017-08-01 |
| 9716066 | Interconnect structure comprising fine pitch backside metal redistribution lines combined with vias | James Jeong, Hsiao-Kang Chang, John Muirhead, Adwait Telang, Puneesh Puri +2 more | 2017-07-25 |
| 9660181 | Logic chip including embedded magnetic tunnel junctions | Tahir Ghani, Joseph M. Steigerwald, John H. Epple, Yih Wang | 2017-05-23 |
| 9530740 | 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach | Mark Bohr, Andrew W. Yeoh, Christopher M. Pelto, Hiten Kothari, Seshu V. Sattiraju +1 more | 2016-12-27 |
| 9489354 | Masking content while preserving layout of a webpage | Michael W. Nail, Homan Lee | 2016-11-08 |
| 9449913 | 3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias | Mark Bohr, Andrew W. Yeoh, Christopher M. Pelto, Hiten Kothari, Seshu V. Sattiraju +1 more | 2016-09-20 |