SS

Seshu V. Sattiraju

IN Intel: 4 patents #8,473 of 30,777Top 30%
Overall (All Time): #1,206,563 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9530740 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach Kevin J. Lee, Mark Bohr, Andrew W. Yeoh, Christopher M. Pelto, Hiten Kothari +1 more 2016-12-27
9449913 3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias Kevin J. Lee, Mark Bohr, Andrew W. Yeoh, Christopher M. Pelto, Hiten Kothari +1 more 2016-09-20
9142510 3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach Kevin J. Lee, Mark Bohr, Andrew W. Yeoh, Christopher M. Pelto, Hiten Kothari +1 more 2015-09-22
7064446 Under bump metallization layer to enable use of high tin content solder bumps John Barnak, Gerald Feldewerth, Ming Fang, Kevin J. Lee, Tzuen-Luh Huang +3 more 2006-06-20