Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
CW

Clair Webb — 11 Patents

Intel: 11 patents #3,726 of 30,777Top 15%
Beaverton, OR: #532 of 3,140 inventorsTop 20%
Oregon: #3,944 of 28,073 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Clair Webb has been granted 11 US patents while listed as an inventor at Intel. The first was granted in 1993 and the most recent in April 2025. Clair Webb ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Clair Webb in Beaverton, OR, US.

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12278144 Gate contact structure over active gate and method to fabricate same Abhijit Jayant Pethe, Tahir Ghani, Mark Bohr, Harry Gomez, Annalisa Cappellani 2025-04-15
11004739 Gate contact structure over active gate and method to fabricate same Abhijit Jayant Pethe, Tahir Ghani, Mark Bohr, Harry Gomez, Annalisa Cappellani 2021-05-11 $38,242,000
10192783 Gate contact structure over active gate and method to fabricate same Abhijit Jayant Pethe, Tahir Ghani, Mark Bohr, Harry Gomez, Annalisa Cappellani 2019-01-29 $23,219,000
9496486 Perpendicular spin transfer torque memory (STTM) device having offset cells and method to form same Brian S. Doyle, David L. Kencke, Charles C. Kuo, Uday Shah, Kaan Oguz +2 more 2016-11-15 $10,003,000
9461143 Gate contact structure over active gate and method to fabricate same Abhijit Jayant Pethe, Tahir Ghani, Mark Bohr, Harry Gomez, Annalisa Cappellani 2016-10-04 $11,494,000
9105839 Perpendicular spin transfer torque memory (STTM) device having offset cells and method to form same Brian S. Doyle, David L. Kencke, Charles C. Kuo, Uday Shah, Kaan Oguz +2 more 2015-08-11 $13,627,000
8786040 Perpendicular spin transfer torque memory (STTM) device having offset cells and method to form same Brian S. Doyle, David L. Kencke, Charles C. Kuo, Uday Shah, Kaan Oguz +2 more 2014-07-22 $29,002,000
6762464 N-p butting connections on SOI substrates Mark Bohr 2004-07-13 $47,892,000
5430595 Electrostatic discharge protection circuit Glen R. Wagner, Jeffrey E. Smith, Jose Maiz, William M. Holt 1995-07-04
5293603 Cache subsystem for microprocessor based computer system with synchronous and asynchronous data path Peter D. MacWilliams, Robert L. Farrell 1994-03-08 $79,318,000
5228134 Cache memory integrated circuit for use with a synchronous central processor bus and an asynchronous memory bus Peter D. MacWilliams, Robert L. Farrell 1993-07-13 $90,380,000