Issued Patents All Time
Showing 251–275 of 394 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9685508 | High voltage field effect transistors | Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Gilbert Dewey, Jack T. Kavalieros +3 more | 2017-06-20 |
| 9685381 | Integrating VLSI-compatible fin structures with selective epitaxial growth and fabricating devices thereon | Niti Goel, Willy Rachmady, Jack T. Kavalieros, Gilbert Dewey, Benjamin Chu-Kung +4 more | 2017-06-20 |
| 9666492 | CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture | Marko Radosavljevic, Gilbert Dewey, Niloy Mukherjee, Jack T. Kavalieros, Willy Rachmady +4 more | 2017-05-30 |
| 9666708 | III-N transistors with enhanced breakdown voltage | Han Wui Then, Benjamin Chu-Kung, Sansaptak Dasgupta, Robert S. Chau, Seung Hoon Sung +1 more | 2017-05-30 |
| 9666583 | Methods of containing defects for non-silicon device engineering | Niti Goel, Niloy Mukherjee, Robert S. Chau, Willy Rachmady, Matthew V. Metz +6 more | 2017-05-30 |
| 9660085 | Wide band gap transistors on non-native semiconductor substrates and methods of manufacture thereof | Han Wui Then, Robert S. Chau, Sansaptak Dasgupta, Marko Radosavljevic, Benjamin Chu-Kung +2 more | 2017-05-23 |
| 9653680 | Techniques for filament localization, edge effect reduction, and forming/switching voltage reduction in RRAM devices | Prashant Majhi, Uday Shah, Niloy Mukherjee, Elijah V. Karpov, Brian S. Doyle +1 more | 2017-05-16 |
| 9653548 | Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack | Gilbert Dewey, Marko Radosavljevic, Benjamin Chu-Kung, Niloy Mukherjee | 2017-05-16 |
| 9640671 | Deep gate-all-around semiconductor device having germanium or group III-V active layer | Willy Rachmady, Van H. Le, Seung Hoon Sung, Jessica S. Kachian, Jack T. Kavalieros +5 more | 2017-05-02 |
| 9640646 | Semiconductor device having group III-V material active region and graded gate dielectric | Gilbert Dewey, Marko Radosavljevic, Matthew V. Metz | 2017-05-02 |
| 9640537 | Non-silicon device heterolayers on patterned silicon substrate for CMOS by combination of selective and conformal epitaxy | Niti Goel, Robert S. Chau, Jack T. Kavalieros, Benjamin Chu-Kung, Matthew V. Metz +7 more | 2017-05-02 |
| 9640422 | III-N devices in Si trenches | Sansaptak Dasgupta, Han Wui Then, Sanaz K. Gardner, Seung Hoon Sung, Marko Radosavljevic +3 more | 2017-05-02 |
| 9634007 | Trench confined epitaxially grown device layer(s) | Seung Hoon Sung, Niti Goel, Jack T. Kavalieros, Sansaptak Dasgupta, Van H. Le +7 more | 2017-04-25 |
| 9627384 | Transistors with high concentration of boron doped germanium | Anand S. Murthy, Glenn A. Glass, Tahir Ghani, Niloy Mukherjee, Jack T. Kavalieros +3 more | 2017-04-18 |
| 9614093 | Strain compensation in transistors | Van H. Le, Benjamin Chu-Kung, Harold Hal W. Kennel, Willy Rachmady, Jack T. Kavalieros | 2017-04-04 |
| 9608055 | Semiconductor device having germanium active layer with underlying diffusion barrier layer | Willy Rachmady, Van H. Le, Jack T. Kavalieros, Robert S. Chau, Harold W. Kennel | 2017-03-28 |
| 9590069 | Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation | Sansaptak Dasgupta, Han Wui Then, Marko Radosavljevic, Niloy Mukherjee, Niti Goel +3 more | 2017-03-07 |
| 9590089 | Variable gate width for gate all-around transistors | Willy Rachmady, Van H. Le, Jack T. Kavalieros, Robert S. Chau, Seung Hoon Sung | 2017-03-07 |
| 9583396 | Making a defect free fin based device in lateral epitaxy overgrowth region | Niti Goel, Benjamin Chu-Kung, Sansaptak Dasgupta, Niloy Mukherjee, Matthew V. Metz +3 more | 2017-02-28 |
| 9577190 | Thermal management structure for low-power nonvolatile filamentary switch | Elijah V. Karpov, Prashant Majhi, Niloy Mukherjee, Uday Shah, Brian S. Doyle +1 more | 2017-02-21 |
| 9570614 | Ge and III-V channel semiconductor devices having maximized compliance and free surface relaxation | Sansaptak Dasgupta, Niti Goel, Van H. Le, Marko Radosavljevic, Gilbert Dewey +8 more | 2017-02-14 |
| 9564490 | Apparatus and methods for forming a modulation doped non-planar transistor | Mantu K. Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack T. Kavalieros | 2017-02-07 |
| 9530878 | III-N material structure for gate-recessed transistors | Han Wui Then, Marko Radosavljevic, Uday Shah, Niloy Mukherjee, Benjamin Chu-Kung +2 more | 2016-12-27 |
| 9502568 | Non-planar quantum well device having interfacial layer and method of forming same | Willy Rachmady, Van H. Le, Robert S. Chau | 2016-11-22 |
| 9490329 | Semiconductor devices with germanium-rich active layers and doped transition layers | Willy Rachmady, Van H. Le, Jessica S. Kachian, Marc C. French, Aaron A. Budrevich | 2016-11-08 |