Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
RD

Ramachandra Divakaruni — 251 Patents

IBM: 237 patents #122 of 70,183Top 1%
Infineon Technologies Ag: 18 patents #789 of 7,486Top 15%
Globalfoundries: 13 patents #279 of 4,424Top 7%
Kabushiki Kaisha Toshiba: 2 patents #9,982 of 21,451Top 50%
SSStmicroelectronics Sa: 2 patents #601 of 1,676Top 40%
ETElpis Technologies: 1 patents #31 of 121Top 30%
Ossining, NY: #5 of 613 inventorsTop 1%
New York: #90 of 115,490 inventorsTop 1%
Overall (All Time): #1,970 of 4,157,543Top 1%
251 Patents All Time

Issued Patents All Time

Showing 126–150 of 251 patents

Patent #TitleCo-InventorsDate
7439135 Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same Kangguo Cheng 2008-10-21
7439559 SOI device with different crystallographic orientations Kangguo Cheng, Carl Radens 2008-10-21
7439568 Vertical body-contacted SOI transistor Kangguo Cheng, Gary B. Bronner, Carl Radens 2008-10-21
7413833 Single exposure of mask levels having a lines and spaces array using alternating phase-shift mask Shahid Butt, Scott Bukofsky, Carl Radens, Wayne F. Ellis 2008-08-19
7384829 Patterned strained semiconductor substrate and device Kangguo Cheng 2008-06-10
7375413 Trench widening without merging Kangguo Cheng 2008-05-20
7358586 Silicon-on-insulator wafer having reentrant shape dielectric trenches Kangguo Cheng 2008-04-15
7348252 Method of forming silicon-on-insulator wafer having reentrant shape dielectric trenches Kangguo Cheng 2008-03-25
7264982 Trench photodetector Kangguo Cheng, Carl Radens 2007-09-04
7247905 Offset vertical device Kangguo Cheng, Geng Wang 2007-07-24
7247536 Vertical DRAM device with self-aligned upper trench shaping Kangguo Cheng, Chun-Yung Sung 2007-07-24
7244980 Line mask defined active areas for 8F2 DRAM cells with folded bit lines and deep trench patterns Rolf Weis, Larry Nesbit 2007-07-17
7226816 Method of forming connection and anti-fuse in layered substrate such as SOI Claude L. Bertin, Russell J. Houghton, Jack A. Mandelman, William R. Tonti 2007-06-05
7223669 Structure and method for collar self-aligned to buried plate Kangguo Cheng, Carl Radens 2007-05-29
7223653 Process for forming a buried plate Kangguo Cheng 2007-05-29
7211474 SOI device with body contact self-aligned to gate Kangguo Cheng 2007-05-01
7195972 Trench capacitor DRAM cell using buried oxide as array top oxide Dureseti Chidambarrao, Deok-kee Kim 2007-03-27
7193262 Low-cost deep trench decoupling capacitor device and process of manufacture Herbert L. Ho, John E. Barth, Jr., Wayne F. Ellis, Johnathan E. Faltermeier, Brent A. Anderson +4 more 2007-03-20
7190042 Self-aligned STI for narrow trenches Jack A. Mandelman, Carl Radens 2007-03-13
7138308 Replacement gate with TERA cap Kangguo Cheng, Kenneth T. Settlemyer, Jr. 2006-11-21
7132324 SOI device with different crystallographic orientations Kangguo Cheng, Carl Radens 2006-11-07
7129130 Out of the box vertical transistor for eDRAM on SOI James W. Adkisson, Gary B. Bronner, Dureseti Chidambarrao, Carl Radens 2006-10-31
7129129 Vertical device with optimal trench shape Thomas N. Adam, David C. Ahlgren, Kangguo Cheng 2006-10-31
7122437 Deep trench capacitor with buried plate electrode and isolation collar Thomas W. Dyer, Chun-Yung Sung, Ravikumar Ramachandran, Carl Radens 2006-10-17
7115934 Method and structure for enhancing trench capacitance Kangguo Cheng 2006-10-03