Issued Patents All Time
Showing 101–125 of 251 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7790530 | Dual port gain cell with side and top gated read transistor | Jack A. Mandelman, Kangguo Cheng, Carl Radens, Geng Wang | 2010-09-07 |
| 7785959 | Method of multi-port memory fabrication with parallel connected trench capacitors in a cell | Kangguo Cheng, Jack A. Mandelman, Carl Radens, Geng Wang | 2010-08-31 |
| 7776706 | Forming SOI trench memory with single-sided buried strap | Kangguo Cheng, Herbert L. Ho, Geng Wang | 2010-08-17 |
| 7759188 | Method of fabricating vertical body-contacted SOI transistor | Kangguo Cheng, Gary B. Bronner, Carl Radens | 2010-07-20 |
| 7737482 | Self-aligned strap for embedded trench memory on hybrid orientation substrate | Kangguo Cheng, Carl Radens | 2010-06-15 |
| 7737502 | Raised STI process for multiple gate ox and sidewall protection on strained Si/SGOI sructure with elevated source/drain | Jochen Beintner, Gary B. Bronner, Byeong Y. Kim | 2010-06-15 |
| 7736965 | Method of making a FinFET device structure having dual metal and high-k gates | Kangguo Cheng | 2010-06-15 |
| 7732872 | Integration scheme for multiple metal gate work function structures | Kangguo Cheng, Michael P. Chudzik, Geng Wang, Robert C. Wong, Haining Yang | 2010-06-08 |
| 7713814 | Hybrid orientation substrate compatible deep trench capacitor embedded DRAM | Kangguo Cheng | 2010-05-11 |
| 7700434 | Trench widening without merging | Kangguo Cheng | 2010-04-20 |
| 7682859 | Patterned strained semiconductor substrate and device | Kangguo Cheng | 2010-03-23 |
| 7683428 | Vertical Fin-FET MOS devices | Dureseti Chidambarrao, Jochen Beintner | 2010-03-23 |
| 7615816 | Buried plate structure for vertical dram devices | Kangguo Cheng, Chun-Yung Sung | 2009-11-10 |
| 7611931 | Semiconductor structures with body contacts and fabrication methods thereof | Kangguo Cheng, Jack A. Mandelman | 2009-11-03 |
| 7601646 | Top-oxide-early process and array top oxide planarization | Deok-kee Kim, Hiroyuki Akatsu, George Worth, Jay William Strane, Byeong Y. Kim | 2009-10-13 |
| 7569450 | Semiconductor capacitors in hot (hybrid orientation technology) substrates | Kangguo Cheng, Carl Radens | 2009-08-04 |
| 7497959 | Methods and structures for protecting one area while processing another area on a chip | Deok-kee Kim, Kenneth T. Settlemyer, Jr., Kangguo Cheng, Carl Radens, Dirk Pfeiffer +4 more | 2009-03-03 |
| 7488642 | Process for forming a buried plate | Kangguo Cheng | 2009-02-10 |
| 7485910 | Simplified vertical array device DRAM/eDRAM integration: method and structure | Deok-kee Kim, Carl Radens, Dae-Gyu Park | 2009-02-03 |
| 7485525 | Method of manufacturing a multiple port memory having a plurality of parallel connected trench capacitors in a cell | Kangguo Cheng, Jack A. Mandelman, Carl Radens, Geng Wang | 2009-02-03 |
| 7470570 | Process for fabrication of FinFETs | Jochen Beintner, Gary B. Bronner, Yujun Li | 2008-12-30 |
| 7459743 | Dual port gain cell with side and top gated read transistor | Jack A. Mandelman, Kangguo Cheng, Carl Radens, Geng Wang | 2008-12-02 |
| 7445987 | Offset vertical device | Kangguo Cheng, Geng Wang | 2008-11-04 |
| 7439135 | Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same | Kangguo Cheng | 2008-10-21 |
| 7439128 | Method of creating deep trench capacitor using a P+ metal electrode | Jack A. Mandelman, Dae-Gyu Park | 2008-10-21 |