NL

Nicholas Anthony Lanzillo

IBM: 88 patents #717 of 70,183Top 2%
📍 Wynantskill, NY: #1 of 35 inventorsTop 3%
🗺 New York: #724 of 115,490 inventorsTop 1%
Overall (All Time): #18,641 of 4,157,543Top 1%
88
Patents All Time

Issued Patents All Time

Showing 51–75 of 88 patents

Patent #TitleCo-InventorsDate
11244859 Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line Koichi Motoyama, Cornelius Brown Peethala, Christopher J. Penny, Lawrence A. Clevenger 2022-02-08
11232977 Stepped top via for via resistance reduction Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Kisik Choi, Robert R. Robison 2022-01-25
11223655 Semiconductor tool matching and manufacturing management in a blockchain Prasad Bhosale, Michael Rizzolo, Chih-Chao Yang 2022-01-11
11217481 Fully aligned top vias Koichi Motoyama, Somnath Ghosh, Christopher J. Penny, Robert R. Robison, Lawrence A. Clevenger 2022-01-04
11195795 Well-controlled edge-to-edge spacing between adjacent interconnects Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Kisik Choi, Robert R. Robison 2021-12-07
11195993 Encapsulation topography-assisted self-aligned MRAM top contact Michael Rizzolo, Benjamin D. Briggs, Lawrence A. Clevenger 2021-12-07
11195792 Top via stack Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Kisik Choi, Robert R. Robison 2021-12-07
11189568 Top via interconnect having a line with a reduced bottom dimension Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Kisik Choi, Robert R. Robison 2021-11-30
11177162 Trapezoidal interconnect at tight BEOL pitch Hosadurga Shobha, Huai Huang, Junli Wang, Koichi Motoyama, Christopher J. Penny +1 more 2021-11-16
11177166 Etch stop layer removal for capacitance reduction in damascene top via integration Christopher J. Penny, Brent A. Anderson, Lawrence A. Clevenger, Robert R. Robison, Kisik Choi 2021-11-16
11177170 Removal of barrier and liner layers from a bottom of a via Chanro Park, Koichi Motoyama, Kenneth Chun Kuen Cheng 2021-11-16
11171084 Top via with next level line selective growth Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Kisik Choi, Robert R. Robison 2021-11-09
11164777 Top via with damascene line and via Lawrence A. Clevenger, Brent A. Anderson, Kisik Choi, Christopher J. Penny, Robert R. Robison 2021-11-02
11158537 Top vias with subtractive line formation Brent A. Anderson, Lawrence A. Clevenger, Christopher J. Penny, Kisik Choi, Robert R. Robison 2021-10-26
11152257 Barrier-less prefilled via formation Hosadurga Shobha, Junli Wang, Lawrence A. Clevenger, Christopher J. Penny, Robert R. Robison +1 more 2021-10-19
11152299 Hybrid selective dielectric deposition for aligned via integration Christopher J. Penny, Hosadurga Shobha, Lawrence A. Clevenger, Robert R. Robison 2021-10-19
11139201 Top via with hybrid metallization Koichi Motoyama, Christopher J. Penny, Somnath Ghosh, Robert R. Robison, Lawrence A. Clevenger 2021-10-05
11062943 Top via interconnects with wrap around liner Koichi Motoyama, Christopher J. Penny, Somnath Ghosh, Robert R. Robison, Lawrence A. Clevenger 2021-07-13
11049744 Optimizing semiconductor binning by feed-forward process adjustment Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo, Theodorus E. Standaert, James H. Stathis 2021-06-29
10978393 Hybrid dielectric scheme for varying liner thickness and manganese concentration Benjamin D. Briggs, Lawrence A. Clevenger, Takeshi Nogami, Christopher J. Penny, Michael Rizzolo 2021-04-13
10978342 Interconnect with self-forming wrap-all-around barrier layer Huai Huang, Takeshi Nogami, Alfred Grill, Benjamin D. Briggs, Christian Lavoie +3 more 2021-04-13
10978343 Interconnect structure having fully aligned vias Chanro Park, Christopher J. Penny, Lawrence A. Clevenger, Balasubramanian Pranatharthiharan 2021-04-13
10886166 Dielectric surface modification in sub-40nm pitch interconnect patterning Chih-Chao Yang 2021-01-05
10830841 Magnetic tunnel junction performance monitoring based on magnetic field coupling Benjamin D. Briggs, Michael Rizzolo, Lawrence A. Clevenger, Theodorus E. Standaert, James H. Stathis 2020-11-10
10796833 Magnetic tunnel junction with low series resistance Benjamin D. Briggs, Michael Rizzolo, Theodorus E. Standaert, Lawrence A. Clevenger, James H. Stathis 2020-10-06