Issued Patents All Time
Showing 26–50 of 79 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8876410 | Self-aligning connectorized fiber array assembly | Kalpendu Shastri, Soham Pathak, Utpal Kumar Chakrabarti, Vipulkumar Patel, Bipin Dama +1 more | 2014-11-04 |
| 8830466 | Arrangement for placement and alignment of opto-electronic components | Kalpendu Shastri, Ravinder Kachru | 2014-09-09 |
| 8803269 | Wafer scale packaging platform for transceivers | Kalpendu Shastri, Vipulkumar Patel, Mark A. Webster, Prakash Gothoskar, Ravinder Kachru +5 more | 2014-08-12 |
| 8780576 | Low CTE interposer | Belgacem Haba | 2014-07-15 |
| 8772946 | Reduced stress TSV and interposer structures | Cyprian Emeka Uzoh, Charles G. Woychik, Terrence Caskey, Huailiang Wei, Craig Mitchell +1 more | 2014-07-08 |
| 8723049 | Low-stress TSV design using conductive particles | Charles G. Woychik, Ilyas Mohammed, Terrence Caskey | 2014-05-13 |
| 8697492 | No flow underfill | Belgacem Haba, Ilyas Mohammed, Ellis Chau, Sang Il Lee | 2014-04-15 |
| 8580621 | Solder interconnect by addition of copper | Mark A. Bachman, John W. Osenbach | 2013-11-12 |
| 8525309 | Flip-chip QFN structure using etched lead frame | Chok J. Chia, Qwai H. Low, Charles G. Woychik | 2013-09-03 |
| 8525312 | Area array quad flat no-lead (QFN) package | Qwai H. Low, Chok J. Chia, Charles G. Woychik, Huailiang Wei | 2013-09-03 |
| 8378478 | Enhanced stacked microelectronic assemblies with central contacts and vias connected to the central contacts | Belgacem Haba, Wael Zohni | 2013-02-19 |
| 8378485 | Solder interconnect by addition of copper | Mark A. Bachman, John W. Osenbach | 2013-02-19 |
| 7727781 | Manufacture of devices including solder bumps | Joze E. Antol, John W. Osenbach, Brian T. Vaccaro | 2010-06-01 |
| 7119432 | Method and apparatus for establishing improved thermal communication between a die and a heatspreader in a semiconductor package | Maniam Alagaratnam | 2006-10-10 |
| 7041516 | Multi chip module assembly | Sarathy Rajagopalan, John McCormick, Maniam Alagaratnam | 2006-05-09 |
| 6858930 | Multi chip module | Leah M. Miller | 2005-02-22 |
| 6777314 | Method of forming electrolytic contact pads including layers of copper, nickel, and gold | John McCormick, Maniam Alagaratnam | 2004-08-17 |
| 6680532 | Multi chip module | Leah M. Miller | 2004-01-20 |
| 6655020 | Method of packaging a high performance chip | Timothy F. Carden, Glenn O. Dearing, Stephen R. Engle, Randall J. Stutzman, George H. Thiel | 2003-12-02 |
| 6618938 | Interposer for semiconductor package assembly | Maniam Alagaratnam, Sunil A. Patel | 2003-09-16 |
| 6586825 | Dual chip in package with a wire bonded die mounted to a substrate | Sarathy Rajagopalan, Maniam Alagaratnam | 2003-07-01 |
| 6552266 | High performance chip packaging and method | Timothy F. Carden, Glenn O. Dearing, Stephen R. Engle, Randall J. Stutzman, George H. Thiel | 2003-04-22 |
| 6552264 | High performance chip packaging and method | Timothy F. Carden, Glenn O. Dearing, Stephen R. Engle, Randall J. Stutzman, George H. Thiel | 2003-04-22 |
| 6518161 | Method for manufacturing a dual chip in package with a flip chip die mounted on a wire bonded die | Sarathy Rajagopalan | 2003-02-11 |
| 6465338 | Method of planarizing die solder balls by employing a die's weight | Sarathy Rajagopalan, Zafer Kutlu | 2002-10-15 |