SR

Sarathy Rajagopalan

Lsi Logic: 9 patents #181 of 1,957Top 10%
PayPal: 1 patents #1,315 of 1,973Top 70%
📍 Fremont, CA: #1,763 of 9,298 inventorsTop 20%
🗺 California: #60,666 of 386,348 inventorsTop 20%
Overall (All Time): #494,841 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
11625727 Dispute resolution system interface Savitha Ajitraj, Manickkam Pandian, Padmini Janaki, Ramaguru Ramasubbu, Rashmi Prakash +5 more 2023-04-11
7352062 Integrated circuit package design Mukul Joshi, Mohan R. Nagar 2008-04-01
7041516 Multi chip module assembly Kishor Desai, John McCormick, Maniam Alagaratnam 2006-05-09
6962437 Method and apparatus for thermal profiling of flip-chip packages Minh Vuong 2005-11-08
6825556 Integrated circuit package design with non-orthogonal die cut out Mukul Joshi, Mohan R. Nagar 2004-11-30
6586825 Dual chip in package with a wire bonded die mounted to a substrate Kishor Desai, Maniam Alagaratnam 2003-07-01
6518161 Method for manufacturing a dual chip in package with a flip chip die mounted on a wire bonded die Kishor Desai 2003-02-11
6465338 Method of planarizing die solder balls by employing a die's weight Kishor Desai, Zafer Kutlu 2002-10-15
6441499 Thin form factor flip chip ball grid array Kumar Nagarajan 2002-08-27
6320127 Method and structure for reducing the incidence of voiding in an underfill layer of an electronic component package Kumar Nagarajan 2001-11-20