MN

Mohan R. Nagar

Lsi Logic: 6 patents #302 of 1,957Top 20%
CI Cisco: 5 patents #2,800 of 13,007Top 25%
LS Lsi: 1 patents #914 of 1,740Top 55%
Overall (All Time): #419,303 of 4,157,543Top 15%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9320183 Ground lid opening on a substrate 2016-04-19
8962388 Method and apparatus for supporting a computer chip on a printed circuit board assembly Kuo-Chuan Liu, Mudasir Ahmad, Bangalore J. Shanker, Jie Xue 2015-02-24
8952523 Integrated circuit package lid configured for package coplanarity Mudasir Ahmad, Weidong Xie 2015-02-10
8736044 Lid for an electrical hardware component Mudasir Ahmad, Kuo-Chuan Liu, Bangalore J. Shanker 2014-05-27
8081484 Method and apparatus for supporting a computer chip on a printed circuit board assembly Kuo-Chuan Liu, Mudasir Ahmad, Bangalore J. Shanker, Jie Xue 2011-12-20
7641776 System and method for increasing yield from semiconductor wafer electroplating Shirish Shah 2010-01-05
7352062 Integrated circuit package design Mukul Joshi, Sarathy Rajagopalan 2008-04-01
6946866 Measurement of package interconnect impedance using tester and supporting tester Aritharan Thurairajaratnam, Anand Govind, Farshad Ghahghahi 2005-09-20
6891392 Substrate impedance measurement Aritharan Thurairajaratnam 2005-05-10
6825556 Integrated circuit package design with non-orthogonal die cut out Mukul Joshi, Sarathy Rajagopalan 2004-11-30
6717423 Substrate impedance measurement Aritharan Thurairajaratnam 2004-04-06
6605954 Reducing probe card substrate warpage 2003-08-12