Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Mark A. Bachman — 19 Patents

ASAgere Systems: 11 patents #86 of 1,849Top 5%
LSLsi: 5 patents #745 of 3,238Top 25%
APAvago Technologies General Ip (Singapore) Pte.: 3 patents #357 of 2,004Top 20%
Wilmington, DE: #228 of 3,182 inventorsTop 8%
Delaware: #430 of 7,163 inventorsTop 7%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Mark A. Bachman has been granted 19 US patents while listed as an inventor at Agere Systems. The first was granted in 2005 and the most recent in April 2017. Mark A. Bachman ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Mark A. Bachman in Wilmington, DE, US.

Patents per Year

Patents granted per year, 2005 to 2017Bar chart with a peak of 4 patents in 2013.peak 42005: 1 patents20052007: 1 patents2008: 1 patents20082009: 1 patents2010: 3 patents20102011: 1 patents2012: 1 patents20122013: 4 patents2014: 2 patents20142015: 2 patents2016: 1 patents20162017: 1 patents2017

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9613847 Integration of shallow trench isolation and through-substrate vias into integrated circuit designs Sailesh Mansinh Merchant, John W. Osenbach 2017-04-04 $50,315,000
9443821 Pb-free solder bumps with improved mechanical properties John W. Osenbach 2016-09-13 $99,841,000
9054064 Stacked interconnect heat sink John W. Osenbach, Sailesh Mansinh Merchant 2015-06-09 $31,185,000
8987137 Method of fabrication of through-substrate vias Sailesh Mansinh Merchant, John W. Osenbach 2015-03-24
8779587 PB-free solder bumps with improved mechanical properties John W. Osenbach 2014-07-15
8742535 Integration of shallow trench isolation and through-substrate vias into integrated circuit designs Sailesh Mansinh Merchant, John W. Osenbach 2014-06-03
8580621 Solder interconnect by addition of copper John W. Osenbach, Kishor Desai 2013-11-12
8507317 Solder bump structure for flip chip semiconductor devices and method of manufacturing therefore Donald S. Bitting, Sailesh Chittipeddi, Seung H. Kang, Sailesh Mansinh Merchant 2013-08-13
8492911 Stacked interconnect heat sink John W. Osenbach, Sailesh Mansinh Merchant 2013-07-23
8378485 Solder interconnect by addition of copper John W. Osenbach, Kishor Desai 2013-02-19
8319343 Routing under bond pad for the replacement of an interconnect layer Vance D. Archer, III, Michael AYUKAWA, Daniel Chesire, Seung H. Kang, Taeho Kook +2 more 2012-11-27
7952206 Solder bump structure for flip chip semiconductor devices and method of manufacture therefore Donald S. Bitting, Sailesh Chittipeddi, Seung H. Kang, Sailesh Mansinh Merchant 2011-05-31
7777333 Structure and method for fabricating flip chip devices Donald S. Bitting, Daniel Chesire, Taeho Kook, Sailesh Mansinh Merchant 2010-08-17
7724359 Method of making electronic entities Ahmed Amin, Frank Baiocchi, John M. DeLucca, John W. Osenbach 2010-05-25
7671436 Electronic packages Ahmed Amin, David Crouthamel, John W. Osenbach, Brian T. Vaccaro 2010-03-02
7479695 Low thermal resistance assembly for flip chip applications David Crouthamel 2009-01-20
7328830 Structure and method for bonding to copper interconnect structures Daniel Chesire, Sailesh Mansinh Merchant 2008-02-12
7221173 Method and structures for testing a semiconductor wafer prior to performing a flip chip bumping process Daniel Chesire, Taeho Kook, Sailesh Mansinh Merchant 2007-05-22
6960836 Reinforced bond pad Daniel Chesire, Sailesh Mansinh Merchant, John W. Osenbach, Kurt G. Steiner 2005-11-01 $11,315,000