Issued Patents All Time
Showing 25 most recent of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11929337 | 3D-interconnect | Qwai H. Low, Patrick Variot | 2024-03-12 |
| 11031362 | 3D-interconnect | Qwai H. Low, Patrick Variot | 2021-06-08 |
| 10181447 | 3D-interconnect | Qwai H. Low, Patrick Variot | 2019-01-15 |
| 9875955 | Low cost hybrid high density package | Kishor Desai, Qwai H. Low, Charles G. Woychik, Huailiang Wei | 2018-01-23 |
| 9508687 | Low cost hybrid high density package | Kishor Desai, Qwai H. Low, Charles G. Woychik, Huailiang Wei | 2016-11-29 |
| 8963310 | Low cost hybrid high density package | Kishor Desai, Qwai H. Low, Charles G. Woychik, Huailiang Wei | 2015-02-24 |
| 8525309 | Flip-chip QFN structure using etched lead frame | Qwai H. Low, Kishor Desai, Charles G. Woychik | 2013-09-03 |
| 8525312 | Area array quad flat no-lead (QFN) package | Qwai H. Low, Kishor Desai, Charles G. Woychik, Huailiang Wei | 2013-09-03 |
| 8129759 | Semiconductor package and method using isolated VSS plane to accommodate high speed circuitry ground isolation | Maurice Othieno, Amar Amin | 2012-03-06 |
| 7804167 | Wire bond integrated circuit package for high speed I/O | Clifford R. Fishley, Abiola Awujoola, Leonard L. Mora, Amar Amin, Maurice Othieno | 2010-09-28 |
| 7646091 | Semiconductor package and method using isolated Vss plane to accommodate high speed circuitry ground isolation | Maurice Othieno, Amar Amin | 2010-01-12 |
| 7327043 | Two layer substrate ball grid array design | Allen S. Lim, Maurice Othieno | 2008-02-05 |
| 6991147 | Insulated bonding wire tool for microelectronic packaging | Owai H. Low, Ramaswamy Ranganathan | 2006-01-31 |
| 6963138 | Dielectric stack | Qwai H. Low, Ramaswamy Ranganathan, Tauman T. Lau | 2005-11-08 |
| 6861343 | Buffer metal layer | Qwai H. Low, Ramaswamy Ranganathan | 2005-03-01 |
| 6743979 | Bonding pad isolation | Michael Berman, Aftab Ahmad, Qwai H. Low, Ramaswamy Ranganathan | 2004-06-01 |
| 6670214 | Insulated bonding wire for microelectronic packaging | Owai H. Low, Ramaswamy Ranganathan | 2003-12-30 |
| 6603200 | Integrated circuit package | Qwai H. Low, Seng-Sooi Lim | 2003-08-05 |
| 6525421 | Molded integrated circuit package | Seng-Sooi Lim, Wee Liew | 2003-02-25 |
| 6519844 | Overmold integrated circuit package | Kumar Nagarajan, Seng-Sooi Lim | 2003-02-18 |
| 6512293 | Mechanically interlocking ball grid array packages and method of making | Seng-Sooi Lim, Wee Liew | 2003-01-28 |
| 6492253 | Method for programming a substrate for array-type packages | Seng-Sooi Lim, Patrick Variot | 2002-12-10 |
| 6489571 | Molded tape ball grid array package | Qwai H. Low, Patrick Variot | 2002-12-03 |
| 6429534 | Interposer tape for semiconductor package | Qwai H. Low, Maniam Alagaratnam | 2002-08-06 |
| 6425179 | Method for assembling tape ball grid arrays | Qwai H. Low, Ramaswamy Ranganathan | 2002-07-30 |