PV

Patrick Variot

Lsi Logic: 23 patents #39 of 1,957Top 2%
IN Invensas: 5 patents #54 of 142Top 40%
LS Lsi: 2 patents #602 of 1,740Top 35%
AT Adeia Semiconductor Bonding Technologies: 1 patents #30 of 46Top 70%
Overall (All Time): #116,537 of 4,157,543Top 3%
31
Patents All Time

Issued Patents All Time

Showing 25 most recent of 31 patents

Patent #TitleCo-InventorsDate
12394728 Method of forming a region shielding within a package of a microelectronic device Hong Shen 2025-08-19
12040284 3D-interconnect with electromagnetic interference (“EMI”) shield and/or antenna Hong Shen 2024-07-16
12021041 Region shielding within a package of a microelectronic device Hong Shen 2024-06-25
11929337 3D-interconnect Chok J. Chia, Qwai H. Low 2024-03-12
11031362 3D-interconnect Chok J. Chia, Qwai H. Low 2021-06-08
10181447 3D-interconnect Chok J. Chia, Qwai H. Low 2019-01-15
8384205 Electronic device package and method of manufacture Qwai H. Low 2013-02-26
7993981 Electronic device package and method of manufacture Qwai H. Low 2011-08-09
6492253 Method for programming a substrate for array-type packages Chok J. Chia, Seng-Sooi Lim 2002-12-10
6489571 Molded tape ball grid array package Chok J. Chia, Qwai H. Low 2002-12-03
6297550 Bondable anodized aluminum heatspreader for semiconductor packages Chok J. Chia, Maniam Alagaratnam 2001-10-02
6143586 Electrostatic protected substrate Chok J. Chia, Qwai H. Low 2000-11-07
6117695 Apparatus and method for testing a flip chip integrated circuit package adhesive layer Adrian Murphy, Manickam Thavarajah 2000-09-12
6110815 Electroplating fixture for high density substrates Chok J. Chia, Maniam Alagaratnam 2000-08-29
6088914 Method for planarizing an array of solder balls Chok J. Chia, Robert T. Trabucco 2000-07-18
6054767 Programmable substrate for array-type packages Chok J. Chia, Seng-Sooi Lim 2000-04-25
5989937 Method for compensating for bottom warpage of a BGA integrated circuit Chok J. Chia, Robert T. Trabucco 1999-11-23
5981311 Process for using a removeable plating bus layer for high density substrates Chok J. Chia, Seng-Sooi Lim 1999-11-09
5933710 Method of providing electrical connection between an integrated circuit die and a printed circuit board Chok J. Chia 1999-08-03
5869889 Thin power tape ball grid array package Chok J. Chia, Maniam Alagaratnam 1999-02-09
5841198 Ball grid array package employing solid core solder balls Chok J. Chia, Maniam Alagaratnam 1998-11-24
5789811 Surface mount peripheral leaded and ball grid array package Chok J. Chia 1998-08-04
5745986 Method of planarizing an array of plastically deformable contacts on an integrated circuit package to compensate for surface warpage Chok J. Chia, Robert T. Trabucco 1998-05-05
5692296 Method for encapsulating an integrated circuit package 1997-12-02
5570272 Apparatus for encapsulating an integrated circuit package 1996-10-29