Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8288269 | Methods for avoiding parasitic capacitance in an integrated circuit package | Jeffrey A. Hall, Shawn Nikoukary, Michael O. Jenkins | 2012-10-16 |
| 8129759 | Semiconductor package and method using isolated VSS plane to accommodate high speed circuitry ground isolation | Maurice Othieno, Chok J. Chia | 2012-03-06 |
| 8049340 | Device for avoiding parasitic capacitance in an integrated circuit package | Jeffrey A. Hall, Shawn Nikoukary, Michael O. Jenkins | 2011-11-01 |
| 7804167 | Wire bond integrated circuit package for high speed I/O | Clifford R. Fishley, Abiola Awujoola, Leonard L. Mora, Maurice Othieno, Chok J. Chia | 2010-09-28 |
| 7646091 | Semiconductor package and method using isolated Vss plane to accommodate high speed circuitry ground isolation | Maurice Othieno, Chok J. Chia | 2010-01-12 |