Issued Patents All Time
Showing 201–225 of 272 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7479014 | Land grid array fabrication using elastomer core and conducting metal shell or mesh | Gareth G. Hougham, Paul A. Lauro, Joseph Zinter | 2009-01-20 |
| 7473587 | High-quality SGOI by oxidation near the alloy melting temperature | Stephen W. Bedell, Anthony G. Domenicucci, Devendra K. Sadana | 2009-01-06 |
| 7442993 | Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer | Stephen W. Bedell, Anthony G. Domenicucci, Effendi Leobandung, Devendra K. Sadana | 2008-10-28 |
| 7410833 | Interconnections for flip-chip using lead-free solders and having reaction barrier layers | Balaram Ghosal, Sung Kwon Kang, Stephen Kilpatrick, Paul A. Lauro, Henry A. Nye, III +2 more | 2008-08-12 |
| 7368924 | Probe structure having a plurality of discrete insulated probe tips projecting from a support surface, apparatus for use thereof and methods of fabrication thereof | Brian S. Beaman, Paul A. Lauro, Yun-Hsin Liao, Daniel Peter Morris, Da-Yuan Shih | 2008-05-06 |
| 7365399 | Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost | Joel P. de Souza, Brian J. Greene, Devendra K. Sadana, Haining Yang | 2008-04-29 |
| 7358166 | Relaxed, low-defect SGOI for strained Si CMOS applications | Paul D. Agnello, Stephen W. Bedell, Robert H. Dennard, Anthony G. Domenicucci, Devendra K. Sadana | 2008-04-15 |
| 7348253 | High-quality SGOI by annealing near the alloy melting point | Stephen W. Bedell, Huajie Chen, Anthony G. Domenicucci, Richard J. Murphy, Devendra K. Sadana | 2008-03-25 |
| 7332922 | Method for fabricating a structure for making contact with a device | Brian S. Beaman, Paul A. Lauro, Maurice Heathcote Norcott, Da-Yuan Shih | 2008-02-19 |
| 7317226 | Patterned SOI by oxygen implantation and annealing | Mark C. Hakey, Steven J. Holmes, Devendra K. Sadana, Ghavam G. Shahidi | 2008-01-08 |
| 7304328 | Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion | Stephen W. Bedell, Devendra K. Sadana | 2007-12-04 |
| 7291539 | Amorphization/templated recrystallization method for hybrid orientation substrates | Katherine L. Saenger, Chun-Yung Sung, Haizhou Yin | 2007-11-06 |
| 7285473 | Method for fabricating low-defect-density changed orientation Si | Joel Pereira de Souza, John A. Ott, Devendra K. Sadana, Katherine L. Saenger | 2007-10-23 |
| 7282945 | Wafer scale high density probe assembly, apparatus for use thereof and methods of fabrication thereof | Brian S. Beaman, Paul A. Lauro, Da-Yuan Shih | 2007-10-16 |
| 7276919 | High density integral test probe | Brian S. Beaman, Paul A. Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George F. Walker | 2007-10-02 |
| 7247546 | Method of forming strained silicon materials with improved thermal conductivity | Stephen W. Bedell, Huajie Chen, Ryan Mitchell, Devendra K. Sadana | 2007-07-24 |
| 7172431 | Electrical connector design and contact geometry and method of use thereof and methods of fabrication thereof | Brian S. Beaman, George Liang-Tai Chiu, Paul A. Lauro, Daniel Peter Morris, Da-Juan Shih | 2007-02-06 |
| 7172930 | Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer | Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Alexander Reznicek, Devendra K. Sadana +1 more | 2007-02-06 |
| 7169226 | Defect reduction by oxidation of silicon | Stephen W. Bedell, Huajie Chen, Anthony G. Domenicucci, Devendra K. Sadana | 2007-01-30 |
| 7141115 | Method of producing silicon-germanium-on-insulator material using unstrained Ge-containing source layers | Stephen W. Bedell, Devendra K. Sadana | 2006-11-28 |
| 7137827 | Interposer with electrical contact button and method | Gareth G. Hougham, Joanna Rosner, Paul A. Lauro, Sherif A. Goma, Joseph Zinter | 2006-11-21 |
| 7125458 | Formation of a silicon germanium-on-insulator structure by oxidation of a buried porous silicon layer | Stephen W. Bedell, Kwang Su Choe, Devendra K. Sadana | 2006-10-24 |
| 7084050 | Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal | Stephen W. Bedell, Joel P. de Souza, Devendra K. Sadana, Ghavam G. Shahidi | 2006-08-01 |
| 7074686 | Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications | Stephen W. Bedell, Jack O. Chu, Steven J. Koester, Devendra K. Sadana | 2006-07-11 |
| 7049660 | High-quality SGOI by oxidation near the alloy melting temperature | Stephen W. Bedell, Anthony G. Domenicucci, Devendra K. Sadana | 2006-05-23 |