JW

Junli Wang

IBM: 418 patents #38 of 70,183Top 1%
Globalfoundries: 20 patents #152 of 4,424Top 4%
SS Stmicroelectronics Sa: 13 patents #86 of 1,676Top 6%
TE Tessera: 4 patents #104 of 271Top 40%
SO Sony: 4 patents #8,966 of 25,231Top 40%
AS Adeia Semiconductor Solutions: 2 patents #9 of 57Top 20%
EU East China Normal University: 1 patents #33 of 168Top 20%
📍 Slingerlands, NY: #1 of 96 inventorsTop 2%
🗺 New York: #26 of 115,490 inventorsTop 1%
Overall (All Time): #509 of 4,157,543Top 1%
437
Patents All Time

Issued Patents All Time

Showing 351–375 of 437 patents

Patent #TitleCo-InventorsDate
9698098 Anti-fuse structure and method for manufacturing the same Hong He, Juntao Li, Chih-Chao Yang 2017-07-04
9691877 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-06-27
9685532 Replacement metal gate structures Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-06-20
9685539 Nanowire isolation scheme to reduce parasitic capacitance Kangguo Cheng, Bruce B. Doris 2017-06-20
9685507 FinFET devices Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-06-20
9673199 Gate cutting for a vertical transistor device Brent A. Anderson, Sivananda K. Kanakasabapathy, Stuart A. Sieg, John R. Sporre 2017-06-06
9666533 Airgap formation between source/drain contacts and gates Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-05-30
9666527 Middle of the line integrated eFuse in trench EPI structure Hong He, Juntao Li, Chih-Chao Yang 2017-05-30
9653575 Vertical transistor with a body contact for back-biasing Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-05-16
9653456 MIM capacitor formation in RMG module Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-05-16
9640641 Silicon germanium fin channel formation Hong He, Nicolas Loubet 2017-05-02
9634027 CMOS structure on SSOI wafer Bruce B. Doris, Hong He, Ali Khakifirooz 2017-04-25
9634005 Gate planarity for FinFET using dummy polish stop Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-04-25
9634010 Field effect transistor device spacers Rama Kambhampati, Ruilong Xie, Tenko Yamashita 2017-04-25
9634090 Preventing buried oxide gouging during planar and FinFET processing on SOI Kern Rim 2017-04-25
9627373 CMOS compatible fuse or resistor using self-aligned contacts Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-04-18
9627263 Stop layer through ion implantation for etch stop Hong He, Siva Kanakasabapathy, Yunpeng Yin, Chiahsun Tseng 2017-04-18
9614057 Enriched, high mobility strained fin having bottom dielectric isolation Bruce B. Doris, Hong He, Juntao Li, Chih-Chao Yang 2017-04-04
9613869 FinFET devices Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-04-04
9607903 Method for forming field effect transistors Rama Kambhampati, Ruilong Xie, Tenko Yamashita 2017-03-28
9607943 Capacitors Veeraraghavan S. Basker, Kangguo Cheng, Christopher J. Penny, Theodorus E. Standaert 2017-03-28
9601386 Fin isolation on a bulk wafer Hong He, Juntao Li, Chih-Chao Yang 2017-03-21
9576980 FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-02-21
9570555 Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices Balasubramanian Pranatharthiharan, Ruilong Xie 2017-02-14
9570591 Forming semiconductor device with close ground rules Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-02-14