JW

Junli Wang

IBM: 418 patents #38 of 70,183Top 1%
Globalfoundries: 20 patents #152 of 4,424Top 4%
SS Stmicroelectronics Sa: 13 patents #86 of 1,676Top 6%
TE Tessera: 4 patents #104 of 271Top 40%
SO Sony: 4 patents #8,966 of 25,231Top 40%
AS Adeia Semiconductor Solutions: 2 patents #9 of 57Top 20%
EU East China Normal University: 1 patents #33 of 168Top 20%
📍 Slingerlands, NY: #1 of 96 inventorsTop 2%
🗺 New York: #26 of 115,490 inventorsTop 1%
Overall (All Time): #509 of 4,157,543Top 1%
437
Patents All Time

Issued Patents All Time

Showing 376–400 of 437 patents

Patent #TitleCo-InventorsDate
9570571 Gate stack integrated metal resistors Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-02-14
9564437 Method and structure for forming FinFET CMOS with dual doped STI regions Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-02-07
9559014 Self-aligned punch through stopper liner for bulk FinFET Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-01-31
9553088 Forming semiconductor device with close ground rules Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2017-01-24
9548388 Forming field effect transistor device spacers Rama Kambhampati, Ruilong Xie, Tenko Yamashita 2017-01-17
9536986 Enriched, high mobility strained fin having bottom dielectric isolation Bruce B. Doris, Hong He, Juntao Li, Chih-Chao Yang 2017-01-03
9536988 Parasitic capacitance reduction Balasubramanian Pranatharthiharan 2017-01-03
9530890 Parasitic capacitance reduction Balasubramanian Pranatharthiharan 2016-12-27
9530651 Replacement metal gate finFET Hemanth Jagannathan, Sanjay C. Mehta, Chun-Chen Yeh, Stefan Schmitz 2016-12-27
9530659 Structure for preventing buried oxide gouging during planar and FinFET Processing on SOI Kern Rim 2016-12-27
9530698 Method and structure for forming FinFET CMOS with dual doped STI regions Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2016-12-27
9520357 Anti-fuse structure and method for manufacturing the same Hong He, Juntao Li, Chih-Chao Yang 2016-12-13
9520392 Semiconductor device including finFET and fin varactor Kangguo Cheng, Ruilong Xie, Tenko Yamashita 2016-12-13
9515070 Replacement metal gate David V. Horak, Effendi Leobandung, Stefan Schmitz 2016-12-06
9508818 Method and structure for forming gate contact above active area with trench silicide Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2016-11-29
9508741 CMOS structure on SSOI wafer Bruce B. Doris, Hong He, Ali Khakifirooz 2016-11-29
9508825 Method and structure for forming gate contact above active area with trench silicide Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2016-11-29
9496281 Dual isolation on SSOI wafer Bruce B. Doris, Hong He, Ali Khakifirooz 2016-11-15
9490253 Gate planarity for finFET using dummy polish stop Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2016-11-08
9490335 Extra gate device for nanosheet Bruce B. Doris, Terence B. Hook 2016-11-08
9490252 MIM capacitor formation in RMG module Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2016-11-08
9484201 Epitaxial silicon germanium fin formation using sacrificial silicon fin templates Hong He, Juntao Li, Chih-Chao Yang 2016-11-01
9484264 Field effect transistor contacts Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2016-11-01
9472407 Replacement metal gate FinFET Hemanth Jagannathan, Sanjay C. Mehta, Chun-Chen Yeh, Stefan Schmitz 2016-10-18
9472670 Field effect transistor device spacers Rama Kambhampati, Ruilong Xie, Tenko Yamashita 2016-10-18