Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6989297 | Variable thickness pads on a substrate surface | Robert David Sebesta | 2006-01-24 |
| 6919514 | Structure having laser ablated features and method of fabricating | John J. Konrad, Jeffrey McKeveny | 2005-07-19 |
| 6900545 | Variable thickness pads on a substrate surface | Robert David Sebesta | 2005-05-31 |
| 6841228 | Structure having embedded flush circuitry features and method of fabricating | Robert D. Edwards, Jeffrey Alan Knight, Allen F. Moring | 2005-01-11 |
| 6739048 | Process of fabricating a circuitized structure | Gerald W. Jones, Ross W. Keesler, Voya R. Markovich, William J. Rudik, William E. Wilson | 2004-05-25 |
| 6730857 | Structure having laser ablated features and method of fabricating | John J. Konrad, Jeffrey McKeveny | 2004-05-04 |
| 6663786 | Structure having embedded flush circuitry features and method of fabricating | Robert D. Edwards, Jeffrey Alan Knight, Allen F. Moring | 2003-12-16 |
| 6618940 | Fine pitch circuitization with filled plated through holes | Kenneth J. Lubert, Curtis Miller, Thomas R. Miller, Robert David Sebesta, Michael Wozniak | 2003-09-16 |
| 6569711 | Methods and apparatus for balancing differences in thermal expansion in electronic packaging | Robin A. Susko | 2003-05-27 |
| 6488198 | Wire bonding method and apparatus | Douglas E. Chrzanowski, John A. Welsh, Jeffrey Zimmerman | 2002-12-03 |
| 6455139 | Process for reducing extraneous metal plating | John J. Konrad, Konstantinos I. Papathomas, Timothy L. Wells | 2002-09-24 |
| 6296897 | Process for reducing extraneous metal plating | John J. Konrad, Konstantinos I. Papathomas, Timothy L. Wells | 2001-10-02 |
| 6291779 | Fine pitch circuitization with filled plated through holes | Kenneth J. Lubert, Curtis Miller, Thomas R. Miller, Robert David Sebesta, Michael Wozniak | 2001-09-18 |
| 6259037 | Polytetrafluoroethylene thin film chip carrier | Natalie B. Feilchenfeld, John S. Kresge, Scott P. Moore, Ronald Peter Nowak | 2001-07-10 |
| 6177728 | Integrated circuit chip device having balanced thermal expansion | Robin A. Susko | 2001-01-23 |
| 6150716 | Metal substrate having an IC chip and carrier mounting | Stephen W. MacQuarrie, Wayne R. Storr | 2000-11-21 |
| 6131278 | Metal substrate having an IC chip and carrier mounting | Stephen W. MacQuarrie, Wayne R. Storr | 2000-10-17 |
| 6131279 | Integrated manufacturing packaging process | Gerald W. Jones, Ross W. Keesler, Voya R. Markovich, William J. Rudik, William E. Wilson | 2000-10-17 |
| 6077766 | Variable thickness pads on a substrate surface | Robert David Sebesta | 2000-06-20 |
| 6059579 | Semiconductor structure interconnector and assembly | John S. Kresge, Scott P. Moore, Robin A. Susko | 2000-05-09 |
| 6027858 | Process for tenting PTH's with PID dry film | Gerald W. Jones, Ross W. Keesler, Voya R. Markovich, Heinke Marcello, William E. Wilson | 2000-02-22 |
| 6013417 | Process for fabricating circuitry on substrates having plated through-holes | Robert David Sebesta | 2000-01-11 |
| 6006428 | Polytetrafluoroethylene thin film chip carrier | Natalie B. Feilchenfeld, John S. Kresge, Scott P. Moore, Ronald Peter Nowak | 1999-12-28 |
| 5966803 | Ball grid array having no through holes or via interconnections | — | 1999-10-19 |
| 5956235 | Method and apparatus for flexibly connecting electronic devices | John S. Kresge, Robin A. Susko | 1999-09-21 |