FJ

Francis J. Downes, Jr.

IBM: 17 patents #6,502 of 70,183Top 10%
📍 Vestal, NY: #44 of 481 inventorsTop 10%
🗺 New York: #8,460 of 115,490 inventorsTop 8%
Overall (All Time): #279,640 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
6887779 Integrated circuit structure David J. Alcoe, Gerald W. Jones, John S. Kresge, Cheryl L. Tytran-Palomaki 2005-05-03
6829823 Method of making a multi-layered interconnect structure Donald S. Farquhar, Elizabeth Foster, Robert M. Japp, Gerald W. Jones, John S. Kresge +3 more 2004-12-14
6720502 Integrated circuit structure David J. Alcoe, Gerald W. Jones, John S. Kresge, Cheryl L. Tytran-Palomaki 2004-04-13
6693031 Formation of a metallic interlocking structure Gerald G. Advocate, Jr., Luis J. Matienzo, Ronald A. Kaschak, John S. Kresge, Daniel C. Van Hart 2004-02-17
6626196 Arrangement and method for degassing small-high aspect ratio drilled holes prior to wet chemical processing Raymond T. Galasco, Lawrence P. Lehman, Robert D. Topa 2003-09-30
6569604 Blind via formation in a photoimageable dielectric material Anilkumar C. Bhatt, Robert Lee Lewis, JR., Voya R. Markovich 2003-05-27
6429384 Chip C4 assembly improvement using magnetic force and adhesive Robert M. Japp, Mark V. Pierson 2002-08-06
6373717 Electronic package with high density interconnect layer Donald S. Farquhar, Elizabeth Foster, Robert M. Japp, Gerald W. Jones, John S. Kresge +3 more 2002-04-16
6348737 Metallic interlocking structure Gerald G. Advocate, Jr., Luis J. Matienzo, Ronald A. Kaschak, John S. Kresge, Daniel C. Van Hart 2002-02-19
6176985 Laminated electroplating rack and connection system for optimized plating Raymond T. Galasco, Robert M. Japp, John Frank Surowka 2001-01-23
6150255 Method of planarizing a curved substrate and resulting structure Stephen Joseph Fuerniss, Gary R. Hill, Anthony P. Ingraham, Voya R. Markovich, Jaynal A. Molla 2000-11-21
6142361 Chip C4 assembly improvement using magnetic force and adhesive Robert M. Japp, Mark V. Pierson 2000-11-07
6043150 Method for uniform plating of dendrites Raymond T. Galasco, Jaynal A. Molla 2000-03-28
5994910 Apparatus, and corresponding method, for stress testing wire bond-type semi-conductor chips Anthony P. Ingraham, Jaynal A. Molla 1999-11-30
5939786 Uniform plating of dendrites Raymond T. Galasco, Jaynal A. Molla 1999-08-17
5940729 Method of planarizing a curved substrate and resulting structure Stephen Joseph Fuerniss, Gary R. Hill, Anthony P. Ingraham, Voya R. Markovich, Jaynal A. Molla 1999-08-17
5230782 Electrolytic process for reducing the organic content of an aqueous composition and apparatus therefore Oscar A. Moreno, Cindy M. Reidsema, Joseph E. Varsik 1993-07-27