Issued Patents All Time
Showing 101–125 of 230 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9721848 | Cutting fins and gates in CMOS devices | Huiming Bu, Kangguo Cheng, Andrew M. Greene, Sivananda K. Kanakasabapathy, Gauri Karve +6 more | 2017-08-01 |
| 9704754 | Self-aligned spacer for cut-last transistor fabrication | Ruqiang Bao, Zuoguang Liu | 2017-07-11 |
| 9647169 | Light emitting diode (LED) using carbon materials | Shu-Jen Han, Keith Kwong Hon Wong, Jun Yuan | 2017-05-09 |
| 9570466 | Structure and method to form passive devices in ETSOI process flow | Ming Cai, Chun-Chen Yeh | 2017-02-14 |
| 9484402 | Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion | Ming Cai, Liyang Song, Chun-Chen Yeh | 2016-11-01 |
| 9472640 | Self aligned embedded gate carbon transistors | Shu-Jen Han, Yu Lu, Keith Kwong Hon Wong | 2016-10-18 |
| 9437677 | Deposition on a nanowire using atomic layer deposition | Zhengwen Li, Kejia Wang, Zhen Zhang, Yu Zhu | 2016-09-06 |
| 9412641 | FinFET having controlled dielectric region height | Zuoguang Liu, Tenko Yamashita, Chun-Chen Yeh | 2016-08-09 |
| 9397197 | Forming wrap-around silicide contact on finFET | Hemanth Jagannathan, Zuoguang Liu, Shogo Mochizuki | 2016-07-19 |
| 9397158 | Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion | Ming Cai, Liyang Song, Chun-Chen Yeh | 2016-07-19 |
| 9390976 | Method of forming epitaxial buffer layer for finFET source and drain junction leakage reduction | Shogo Mochizuki, Andreas Scholze, Chun-Chen Yeh | 2016-07-12 |
| 9337289 | Replacement gate MOSFET with a high performance gate electrode | Zhengwen Li, Randolph F. Knarr, Chengwen Pei, Gan Wang, Yanfeng Wang +3 more | 2016-05-10 |
| 9318581 | Forming wrap-around silicide contact on finFET | Hemanth Jagannathan, Zuoguang Liu, Shogo Mochizuki | 2016-04-19 |
| 9312358 | Partially-blocked well implant to improve diode ideality with SiGe anode | Wilfried Haensch, Gan Wang, Yanfeng Wang, Xin Wang | 2016-04-12 |
| 9299795 | Partial sacrificial dummy gate with CMOS device with high-k metal gate | Wilfried E. Haensch, Shu-Jen Han, Daniel Jaeger, Yu Lu, Keith Kwong Hon Wong | 2016-03-29 |
| 9287399 | Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels | Bhupesh Chandra, Paul Chang, Gregory G. Freeman, Judson R. Holt, Arvind Kumar +6 more | 2016-03-15 |
| 9252234 | Partially-blocked well implant to improve diode ideality with SiGe anode | Wilfried Haensch, Gan Wang, Yanfeng Wang, Xin Wang | 2016-02-02 |
| 9252146 | Work function adjustment by carbon implant in semiconductor devices including gate structure | Yue Liang, William K. Henson, Shreesh Narasimha, Yanfeng Wang | 2016-02-02 |
| 9250204 | Graphene sensor | Shu-Jen Han, Chung-Hsun Lin, Ning Su | 2016-02-02 |
| 9190520 | Strained finFET with an electrically isolated channel | Henry K. Utomo, Kangguo Cheng, Ramachandra Divakaruni, Myung-Hee Na, Ravikumar Ramachandran +2 more | 2015-11-17 |
| 9171954 | FinFET structure and method to adjust threshold voltage in a FinFET structure | Eduard A. Cartier, Brian J. Greene, Gan Wang, Yanfeng Wang, Keith Kwong Hon Wong | 2015-10-27 |
| 9157887 | Graphene sensor | Shu-Jen Han, Chung-Hsun Lin, Ning Su | 2015-10-13 |
| 9142660 | Method to fabricate a vertical transistor having an asymmetric gate with two conductive layers having different work functions | Shu-Jen Han, Keith Kwong Hon Wong, Jun Yuan | 2015-09-22 |
| 9105725 | Semiconductor-on-insulator device including stand-alone well implant to provide junction butting | Wilfried Haensch, Gan Wang, Xin Wang, Yanfeng Wang, Keith Kwong Hon Wong | 2015-08-11 |
| 9087811 | Self aligned embedded gate carbon transistors | Shu-Jen Han, Yu Lu, Keith Kwong Hon Wong | 2015-07-21 |