BB

Benjamin D. Briggs

IBM: 162 patents #252 of 70,183Top 1%
TE Tessera: 19 patents #21 of 271Top 8%
Applied Materials: 6 patents #1,918 of 7,310Top 30%
AS Adeia Semiconductor Solutions: 3 patents #3 of 57Top 6%
📍 Pleasantdale, NY: #1 of 14 inventorsTop 8%
🗺 New York: #162 of 115,490 inventorsTop 1%
Overall (All Time): #3,751 of 4,157,543Top 1%
190
Patents All Time

Issued Patents All Time

Showing 126–150 of 190 patents

Patent #TitleCo-InventorsDate
10211138 Metal silicate spacers for fully aligned vias Jessica Dechene, Elbert E. Huang, Joe Lee 2019-02-19
10204828 Enabling low resistance gates and contacts integrated with bilayer dielectrics Ruqiang Bao, Lawrence A. Clevenger, Koichi Motoyama, Cornelius Brown Peethala, Michael Rizzolo +1 more 2019-02-12
10195901 Smartwatch blackbox Lawrence A. Clevenger, Leigh Anne H. Clevenger, Jonathan H. Connell, II, Nalini K. Ratha, Michael Rizzolo 2019-02-05
10192829 Low-temperature diffusion doping of copper interconnects independent of seed layer composition Lawrence A. Clevenger, Chao-Kun Hu, Takeshi Nogami, Deepika Priyadarshini, Michael Rizzolo 2019-01-29
10170411 Airgap protection layer for via alignment Lawrence A. Clevenger, Christopher J. Penny, Michael Rizzolo 2019-01-01
10170416 Selective blocking boundary placement for circuit locations requiring electromigration short-length Elbert E. Huang, Joe Lee, Christopher J. Penny 2019-01-01
10153202 Neutral atom beam nitridation for copper interconnect Lawrence A. Clevenger, Michael Rizzolo, Chih-Chao Yang 2018-12-11
10150323 Structure, system, method, and recording medium of implementing a directed self-assembled security pattern Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo 2018-12-11
10134674 Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects James J. Kelly, Koichi Motoyama, Roger A. Quon, Michael Rizzolo, Theodorus E. Standaert 2018-11-20
10109579 Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny, Michael Rizzolo 2018-10-23
10099108 Dynamic rigidity mechanism Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo 2018-10-16
10090247 Semiconductor device formed by wet etch removal of Ru selective to other metals Cornelius Brown Peethala, David L. Rath 2018-10-02
10083905 Skip-vias bypassing a metallization level at minimum pitch Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny, Michael Rizzolo 2018-09-25
10046698 Smartwatch blackbox Lawrence A. Clevenger, Leigh Anne H. Clevenger, Jonathan H. Connell, II, Nalini K. Ratha, Michael Rizzolo 2018-08-14
10046601 Smartwatch blackbox Lawrence A. Clevenger, Leigh Anne H. Clevenger, Jonathan H. Connell, II, Nalini K. Ratha, Michael Rizzolo 2018-08-14
10049920 Reduced tip-to-tip and via pitch at line end Brent A. Anderson, Theodorus E. Standaert 2018-08-14
10049974 Metal silicate spacers for fully aligned vias Jessica Dechene, Elbert E. Huang, Joe Lee 2018-08-14
10045096 Social media modification of behavior and mobile screening for impairment Lawrence A. Clevenger, Leigh Anne H. Clevenger, Jonathan H. Connell, II, Nalini K. Ratha, Michael Rizzolo 2018-08-07
10020223 Reduced tip-to-tip and via pitch at line end Brent A. Anderson, Theodorus E. Standaert 2018-07-10
10002831 Selective and non-selective barrier layer wet removal Elbert E. Huang, Raghuveer R. Patlolla, Cornelius Brown Peethala, David L. Rath, Hosadurga Shobha 2018-06-19
9997451 Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny, Michael Rizzolo 2018-06-12
9984916 Uniform dielectric recess depth during fin reveal Lawrence A. Clevenger, Michael Rizzolo, Jay William Strane 2018-05-29
9985199 Prevention of switching of spins in magnetic tunnel junctions by on-chip parasitic magnetic shield Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Michael Rizzolo, Theodorus E. Standaert 2018-05-29
9984935 Uniform dielectric recess depth during fin reveal Lawrence A. Clevenger, Michael Rizzolo, Jay William Strane 2018-05-29
9984923 Barrier layers in trenches and vias Lawrence A. Clevenger, Cornelius Brown Peethala, Michael Rizzolo, Chih-Chao Yang 2018-05-29