Issued Patents All Time
Showing 26–50 of 190 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11263068 | Proximity correction in three-dimensional manufacturing | Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christopher J. Penny, Michael Rizzolo, Aldis Sipolins | 2022-03-01 |
| 11257717 | Selective recessing to form a fully aligned via | Jessica Dechene, Elbert E. Huang, Joe Lee, Theodorus E. Standaert | 2022-02-22 |
| 11195993 | Encapsulation topography-assisted self-aligned MRAM top contact | Michael Rizzolo, Nicholas Anthony Lanzillo, Lawrence A. Clevenger | 2021-12-07 |
| 11164377 | Motion-controlled portals in virtual reality | Aldis Sipolins, Lawrence A. Clevenger, Michael Rizzolo, Christopher J. Penny, Patrick Watson | 2021-11-02 |
| 11158584 | Selective CVD alignment-mark topography assist for non-volatile memory | Michael Rizzolo, Chih-Chao Yang, Lawrence A. Clevenger | 2021-10-26 |
| 11138890 | Secure access for drone package delivery | Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christopher J. Penny, Michael Rizzolo, Aldis Sipolins | 2021-10-05 |
| 11132712 | Method for using 3D positional spatial olfaction for virtual marketing | Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christoper J. Penny, Michael Rizzolo, Aldis Sipolins | 2021-09-28 |
| 11101172 | Dielectric damage-free dual damascene Cu interconnects without barrier at via bottom | Koichi Motoyama, Gangadhara Raja Muthinti, Cornelius Brown Peethala, Lawrence A. Clevenger | 2021-08-24 |
| 11081388 | Forming barrierless contact | Kisik Choi, Koichi Motoyama, Ashim Dutta, Iqbal Rashid Saraf | 2021-08-03 |
| 11056429 | Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device | Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny, Michael Rizzolo | 2021-07-06 |
| 11049744 | Optimizing semiconductor binning by feed-forward process adjustment | Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Michael Rizzolo, Theodorus E. Standaert, James H. Stathis | 2021-06-29 |
| 11018090 | Selective CVD alignment-mark topography assist for non-volatile memory | Michael Rizzolo, Chih-Chao Yang, Lawrence A. Clevenger | 2021-05-25 |
| 11004790 | Method of manufacturing an interconnect without dielectric exclusion zones by thermal decomposition of a sacrificial filler material | Lawrence A. Clevenger, Christopher J. Penny, Michael Rizzolo | 2021-05-11 |
| 10991619 | Top via process accounting for misalignment by increasing reliability | Chen Zhang, Lawrence A. Clevenger, Brent A. Anderson, Chih-Chao Yang | 2021-04-27 |
| 10985056 | Structure and method to improve FAV RIE process margin and Electromigration | Joe Lee, Theodorus E. Standaert | 2021-04-20 |
| 10978393 | Hybrid dielectric scheme for varying liner thickness and manganese concentration | Lawrence A. Clevenger, Nicholas Anthony Lanzillo, Takeshi Nogami, Christopher J. Penny, Michael Rizzolo | 2021-04-13 |
| 10978342 | Interconnect with self-forming wrap-all-around barrier layer | Huai Huang, Takeshi Nogami, Alfred Grill, Nicholas Anthony Lanzillo, Christian Lavoie +3 more | 2021-04-13 |
| 10971030 | Remote physical training | Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christopher J. Penny, Michael Rizzolo, Aldis Sipolins | 2021-04-06 |
| 10964588 | Selective ILD deposition for fully aligned via with airgap | Christopher J. Penny, Huai Huang, Lawrence A. Clevenger, Michael Rizzolo, Hosadurga Shobha | 2021-03-30 |
| 10957646 | Hybrid BEOL metallization utilizing selective reflection mask | Cornelius Brown Peethala, Michael Rizzolo, Koichi Motoyama, Gen Tsutsui, Ruqiang Bao +2 more | 2021-03-23 |
| 10957584 | Structure and method to improve FAV RIE process margin and electromigration | Joe Lee, Theodorus E. Standaert | 2021-03-23 |
| 10957582 | Self aligned via and pillar cut for at least a self aligned double pitch | Lawrence A. Clevenger, Michael Rizzolo, Terry A. Spooner, Theodorus E. Standaert | 2021-03-23 |
| 10957581 | Self aligned via and pillar cut for at least a self aligned double pitch | Lawrence A. Clevenger, Michael Rizzolo, Terry A. Spooner, Theodorus E. Standaert | 2021-03-23 |
| 10943866 | Method and structure to construct cylindrical interconnects to reduce resistance | Michael Rizzolo, Christopher J. Penny, Huai Huang, Lawrence A. Clevenger, Hosadurga Shobha | 2021-03-09 |
| 10916501 | Back end of line electrical fuse structure and method of fabrication | Lawrence A. Clevenger, Michael Rizzolo, Chih-Chao Yang | 2021-02-09 |