Issued Patents All Time
Showing 101–125 of 542 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10742218 | Vertical transport logic circuit cell with shared pitch | Albert M. Chu | 2020-08-11 |
| 10741544 | Integration of electrostatic discharge protection into vertical fin technology | Huiming Bu, Terence B. Hook, Xuefeng Liu, Junli Wang | 2020-08-11 |
| 10734372 | Vertical transport static random-access memory cells with transistors of active regions arranged in linear rows | Stuart A. Sieg, Junli Wang | 2020-08-04 |
| 10734277 | Top via back end of the line interconnect integration | Chih-Chao Yang, Lawrence A. Clevenger, Benjamin D. Briggs | 2020-08-04 |
| 10727316 | Vertical transistor fabrication and devices | Bruce B. Doris, Seong-Dong Kim, Rajasekhar Venigalla | 2020-07-28 |
| 10720425 | Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor | Alain Loiseau | 2020-07-21 |
| 10714616 | FINFET having a gate structure in a trench feature in a bent fin | Andres Bryant, Edward J. Nowak | 2020-07-14 |
| 10714396 | Variable gate lengths for vertical transistors | Edward J. Nowak | 2020-07-14 |
| 10672905 | Replacement metal gate process for vertical transport field-effect transistor with self-aligned shared contacts | Ruqiang Bao, Choonghyun Lee, Hemanth Jagannathan | 2020-06-02 |
| 10672670 | Replacement metal gate process for vertical transport field-effect transistors with multiple threshold voltages | Ruqiang Bao, Hemanth Jagannathan, Choonghyun Lee | 2020-06-02 |
| 10629703 | Sloped finFET with methods of forming same | Edward J. Nowak | 2020-04-21 |
| 10629443 | Bottom source/drain silicidation for vertical field-effect transistor (FET) | Huiming Bu, Terence B. Hook, Fee Li Lie, Junli Wang | 2020-04-21 |
| 10622477 | Fabrication of a vertical field effect transistor device with a modified vertical fin geometry | Edward J. Nowak | 2020-04-14 |
| 10622459 | Vertical transistor fabrication and devices | Bruce B. Doris, Seong-Dong Kim, Rajasekhar Venigalla | 2020-04-14 |
| 10622458 | Self-aligned contact for vertical field effect transistor | Steven R. Bentley, Su Chen Fan, Balasubramanian Pranatharthiharan, Junli Wang, Ruilong Xie | 2020-04-14 |
| 10615276 | Integration of input/output device in vertical field-effect transistor technology | Xuefeng Liu, Junli Wang, Terence B. Hook, Gauri Karve | 2020-04-07 |
| 10615082 | VFET metal gate patterning for vertical transport field effect transistor | Ruqiang Bao, Kangguo Cheng, Hemanth Jagannathan, Choonghyun Lee, Junli Wang | 2020-04-07 |
| 10607992 | Semiconductor device and method of forming the semiconductor device | Shawn P. Fetterolf, Terence B. Hook | 2020-03-31 |
| 10593803 | Self-aligned shallow trench isolation and doping for vertical fin transistors | Fee Li Lie, Junli Wang | 2020-03-17 |
| 10593797 | Vertical transport field effect transistor structure with self-aligned top junction through early top source/drain epitaxy | Shogo Mochizuki, Hemanth Jagannathan, Junli Wang | 2020-03-17 |
| 10573727 | Vertical transistor device | Huiming Bu, Fee Li Lie, Shogo Mochizuki, Junli Wang | 2020-02-25 |
| 10573562 | Integrating a planar field effect transistor (FET) with a vertical FET | Edward J. Nowak | 2020-02-25 |
| 10566453 | Vertical transistor contact for cross-coupling in a memory cell | Terence B. Hook, Junli Wang | 2020-02-18 |
| 10559572 | Vertical transistor contact for a memory cell with increased density | Terence B. Hook, Junli Wang | 2020-02-11 |
| 10529625 | 3D vertical FET with top and bottom gate contacts | Albert M. Chu | 2020-01-07 |