Issued Patents All Time
Showing 25 most recent of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12341089 | Device package substrate structure and method therefor | Trent S. Uehling, Tingdong Zhou | 2025-06-24 |
| 11908784 | Packaged semiconductor device assembly | Akhilesh Kumar Singh, Andrew Jefferson Mawer, Nishant Lakhera, Nihaar N. Mahatme | 2024-02-20 |
| 11798871 | Device package substrate structure and method therefor | Trent S. Uehling, Tingdong Zhou | 2023-10-24 |
| 11270972 | Package with conductive underfill ground plane | Nishant Lakhera, Akhilesh Kumar Singh | 2022-03-08 |
| 11189557 | Hybrid package | Akhilesh Kumar Singh, Nishant Lakhera | 2021-11-30 |
| 11018024 | Method of fabricating embedded traces | Trent S. Uehling | 2021-05-25 |
| 10722947 | Micro-selective sintering laser systems and methods thereof | Michael Cullinan, Nilabh K. Roy, Anil Yuksel | 2020-07-28 |
| 10537019 | Substrate dielectric crack prevention using interleaved metal plane | Tingdong Zhou, Twila J. Eichman, Stanley Andrew Cejka, James S. Golab | 2020-01-14 |
| 9997445 | Substrate interconnections for packaged semiconductor device | Kai Yun Yow, Bihua He, Navas Khan Oratti Kalandar, Lan Chu Tan, Yuan Zang | 2018-06-12 |
| 9978669 | Packaged semiconductor device having a lead frame and inner and outer leads and method for forming | — | 2018-05-22 |
| 9935079 | Laser sintered interconnections between die | Trent S. Uehling, Leo M. Higgins, III | 2018-04-03 |
| 9698093 | Universal BGA substrate | Ly Hoon Khoo, Wen Shi Koh, Wai Yew Lo, Zi Song Poh, Kai Yun Yow | 2017-07-04 |
| 9474162 | Circuit substrate and method of manufacturing same | Lan Chu Tan | 2016-10-18 |
| 9437492 | Substrate for alternative semiconductor die configurations | Kai Yun Yow, Lan Chu Tan | 2016-09-06 |
| 9401345 | Semiconductor device package with organic interposer | Navas Khan Oratti Kalandar, Lan Chu Tan | 2016-07-26 |
| 9287236 | Flexible packaged integrated circuit | Teck Beng Lau, Chin Teck Siong | 2016-03-15 |
| 9269659 | Interposer with overmolded vias | Lan Chu Tan | 2016-02-23 |
| 9209120 | Semiconductor package with lead mounted power bar | Kong Bee Tiu, Wai Yew Lo | 2015-12-08 |
| 9209147 | Method of forming pillar bump | Lee Fee Ngion, Navas Khan Oratti Kalandar, Zi Song Poh | 2015-12-08 |
| 9202770 | Non-homogeneous molding of packaged semiconductor devices | Lan Chu Tan | 2015-12-01 |
| 9177834 | Power bar design for lead frame-based packages | Meng Kong Lye, Lan Chu Tan, Seng Kiong Teng | 2015-11-03 |
| 9159682 | Copper pillar bump and flip chip package using same | Boon Yew Low, Navas Khan Oratti Kalandar | 2015-10-13 |
| 9134193 | Stacked die sensor package | Lau Teck Beng, Sheng Ping Took | 2015-09-15 |
| 9053972 | Pillar bump formed using spot-laser | Lan Chu Tan | 2015-06-09 |
| 9040335 | Side vented pressure sensor device | Low Boon Yew, Teck Beng Lau | 2015-05-26 |