Issued Patents All Time
Showing 1–25 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12416863 | Dry develop process of photoresist | Yuqiong Dai, Madhur Sachan, Hoyung David Hwang | 2025-09-16 |
| 12300491 | Deposition of semiconductor integration films | Lakmal C. Kalutarage, Mark Saly, Bhaskar Jyoti Bhuyan, Thomas Knisley, Kelvin Chan +3 more | 2025-05-13 |
| 12084764 | Vapor phase photoresists deposition | Lakmal C. Kalutarage, Aaron Dangerfield, Mark Saly, David Thompson, Susmit Singha Roy | 2024-09-10 |
| 12068170 | Vapor phase thermal etch solutions for metal oxo photoresists | Lakmal C. Kalutarage, Mark Saly, Bhaskar Jyoti Bhuyan, Madhur Sachan | 2024-08-20 |
| 12033866 | Vapor phase thermal etch solutions for metal oxo photoresists | Lakmal C. Kalutarage, Mark Saly, Bhaskar Jyoti Bhuyan, Madhur Sachan | 2024-07-09 |
| 11886120 | Deposition of semiconductor integration films | Lakmal C. Kalutarage, Mark Saly, Bhaskar Jyoti Bhuyan, Thomas Knisley, Kelvin Chan +3 more | 2024-01-30 |
| 11881402 | Self aligned multiple patterning | Lili Feng, Madhur Sachan | 2024-01-23 |
| 11869807 | Fully self-aligned subtractive etch | Lili Feng, Yuqiong Dai, Madhur Sachan, Ho-yung David Hwang | 2024-01-09 |
| 11705366 | Methods for controllable metal and barrier-liner recess | He Ren, Amrita B. Mullick, Mehul Naik, Uday Mitra | 2023-07-18 |
| 11621172 | Vapor phase thermal etch solutions for metal oxo photoresists | Lakmal C. Kalutarage, Mark Saly, Bhaskar Jyoti Bhuyan, Madhur Sachan | 2023-04-04 |
| 11562904 | Deposition of semiconductor integration films | Lakmal C. Kalutarage, Mark Saly, Bhaskar Jyoti Bhuyan, Thomas Knisley, Kelvin Chan +3 more | 2023-01-24 |
| 11437273 | Self-aligned contact and contact over active gate structures | Yuriy Shusterman, Madhur Sachan, Susmit Singha Roy, Sanjay Natarajan | 2022-09-06 |
| 11437274 | Fully self-aligned via | Madhur Sachan, Susmit Singha Roy, Gabriela Alva, Ho-yung David Hwang, Uday Mitra +4 more | 2022-09-06 |
| 11232955 | Methods of etching metal oxides with less etch residue | Amrita B. Mullick, Abhijit Basu Mallick, Srinivas Gandikota, Susmit Singha Roy, Yingli Rao +1 more | 2022-01-25 |
| 11217448 | Methods for reducing transfer pattern defects in a semiconductor device | Steven R. Sherman, Nadine Alexis, Lin Zhou | 2022-01-04 |
| 11164938 | DRAM capacitor module | Uday Mitra, Ho-yung David Hwang, Sanjay Natarajan, Lequn Liu | 2021-11-02 |
| 11133152 | Methods and apparatus for performing profile metrology on semiconductor structures | Russell Chin Yee Teo, Madhur Sachan | 2021-09-28 |
| 11062942 | Methods for controllable metal and barrier-liner recess | He Ren, Amrita B. Mullick, Mehul Naik, Uday Mitra | 2021-07-13 |
| 11037825 | Selective removal process to create high aspect ratio fully self-aligned via | Amrita B. Mullick, Madhur Sachan, He Ren, Swaminathan Srinivasan, Uday Mitra | 2021-06-15 |
| 10892187 | Method for creating a fully self-aligned via | Uday Mitra, Sanjay Natarajan | 2021-01-12 |
| 10892183 | Methods for removing metal oxides | Amrita B. Mullick, Uday Mitra | 2021-01-12 |
| 10790191 | Selective removal process to create high aspect ratio fully self-aligned via | Amrita B. Mullick, Madhur Sachan, He Ren, Swaminathan Srinivasan, Uday Mitra | 2020-09-29 |
| 10777414 | Methods for reducing transfer pattern defects in a semiconductor device | Steven R. Sherman, Nadine Alexis, Lin Zhou | 2020-09-15 |
| 10699953 | Method for creating a fully self-aligned via | Amrita B. Mullick, Nitin K. Ingle, Xikun Wang, Uday Mitra, Ho-yung David Hwang | 2020-06-30 |
| 10620263 | System and method for fault isolation by emission spectra analysis | Herve Deslandes, Prasad Sabbineni | 2020-04-14 |