Issued Patents All Time
Showing 101–116 of 116 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7585704 | Method of producing highly strained PECVD silicon nitride thin films at low temperature | Michael P. Belyansky, Oleg Gluschenkov, Anupama Mallikarjunan | 2009-09-08 |
| 7487247 | Systems, methods and computer program products for improving placement performance of message transforms by exploiting aggressive replication | Robert Evan Strom | 2009-02-03 |
| 7482282 | Use of dilute hydrochloric acid in advanced interconnect contact clean in nickel semiconductor technologies | David F. Hilscher | 2009-01-27 |
| 7446062 | Device having dual etch stop liner and reformed silicide layer and related methods | Dureseti Chidambarrao, Rajeev Malik, Shreesh Narasimha | 2008-11-04 |
| 7446395 | Device having dual etch stop liner and protective layer | Dureseti Chidambarrao, Rajeev Malik, Shreesh Narasimha | 2008-11-04 |
| 7411227 | CMOS silicide metal gate integration | Ricky S. Amos, Diane C. Boyd, Cyril Cabral, Jr., Richard D. Kaplan, Jakub Kedzierski +6 more | 2008-08-12 |
| 7382933 | System and method for semantic video segmentation based on joint audiovisual and text analysis | Chitra Dorai, Youngja Park | 2008-06-03 |
| 7380005 | Systems, methods and computer program products for improving placement performance of message transforms by exploiting aggressive replication | Robert Evan Strom | 2008-05-27 |
| 7348635 | Device having enhanced stress state and related methods | Dureseti Chidambarrao, Rajeev Malik, Shreesh Narasimha, Haining Yang, Huilong Zhu | 2008-03-25 |
| 7344983 | Clustered surface preparation for silicide and metal contacts | Sadanand V. Deshpande, Kevin E. Mello, Renee T. Mo, Wesley C. Natzle, Kirk D. Peterson +1 more | 2008-03-18 |
| 7306983 | Method for forming dual etch stop liner and protective layer in a semiconductor device | Dureseti Chidambarrao, Rajeev Malik, Shreesh Narasimha | 2007-12-11 |
| 7244644 | Undercut and residual spacer prevention for dual stressed layers | Huilong Zhu, Brian L. Tessier, Huicai Zhong | 2007-07-17 |
| 7056782 | CMOS silicide metal gate integration | Ricky S. Amos, Diane C. Boyd, Cyril Cabral, Jr., Richard D. Kaplan, Jakub Kedzierski +6 more | 2006-06-06 |
| 6989318 | Method for reducing shallow trench isolation consumption in semiconductor devices | Bruce B. Doris | 2006-01-24 |
| 6921711 | Method for forming metal replacement gate of high performance | Cyril Cabral, Jr., Paul C. Jamison, Victor Ku, Vijay Narayanan, An Steegen +2 more | 2005-07-26 |
| 5520769 | Method for measuring concentration of dopant within a semiconductor substrate | Michael Barrett, Chih-Kang Shih, Donald A. Tiffin, Michael J. Dennis | 1996-05-28 |