Issued Patents All Time
Showing 26–50 of 78 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6492258 | METHOD FOR REDUCING STRESS-INDUCED VOIDS FOR 0.25-&mgr;M AND SMALLER SEMICONDUCTOR CHIP TECHNOLOGY BY ANNEALING INTERCONNECT LINES AND USING LOW BIAS VOLTAGE AND LOW INTERLAYER DIELECTRIC DEPOSITION RATE AND SEMICONDUCTOR CHIP MADE THEREBY | Minh Van Ngo, Paul R. Besser, Matthew S. Buynoski, John Caffall, Nick Maccrae +1 more | 2002-12-10 |
| 6489230 | Integration of low-k SiOF as inter-layer dielectric | — | 2002-12-03 |
| 6472336 | Forming an encapsulating layer after deposition of a dielectric comprised of corrosive material | Suzette K. Pangrle, Minh Van Ngo | 2002-10-29 |
| 6444593 | Surface treatment of low-K SiOF to prevent metal interaction | Minh Van Ngo, Guarionex Morales | 2002-09-03 |
| 6429121 | Method of fabricating dual damascene with silicon carbide via mask/ARC | Dawn Hopper, Ramkumar Subramanian | 2002-08-06 |
| 6429108 | Non-volatile memory device with encapsulated tungsten gate and method of making same | Chi Chang, Keizaburo Yoshie, Yu Sun | 2002-08-06 |
| 6420278 | Method for improving the dielectric constant of silicon-based semiconductor materials | Dawn Hopper, Lu You | 2002-07-16 |
| 6407009 | Methods of manufacture of uniform spin-on films | Lu You, Dawn Hopper | 2002-06-18 |
| 6400030 | Self-aligning vias for semiconductors | Fei Wang, Robin Cheung, Mark S. Chang, Angela T. Hui | 2002-06-04 |
| 6400023 | Integration of low-k SiOF for damascene structure | — | 2002-06-04 |
| 6388309 | Apparatus and method for manufacturing semiconductors using low dielectric constant materials | Lu You, Dawn Hopper | 2002-05-14 |
| 6387825 | Solution flow-in for uniform deposition of spin-on films | Lu You, Dawn Hopper | 2002-05-14 |
| 6361837 | Method and system for modifying and densifying a porous film | Suzette K. Pangrle, Shekhar Pramanick | 2002-03-26 |
| 6355546 | Thermally grown protective oxide buffer layer for ARC removal | Lewis Shen | 2002-03-12 |
| 6346467 | Method of making tungsten gate MOS transistor and memory cell by encapsulating | Chi Chang, Keizaburo Yoshie, Yu Sun | 2002-02-12 |
| 6335273 | Surface treatment of low-K SiOF to prevent metal interaction | Guarionex Morales, Simon S. Chan | 2002-01-01 |
| 6329718 | Method for reducing stress-induced voids for 0.25m.mu. and smaller semiconductor chip technology by annealing interconnect lines and using low bias voltage and low interlayer dielectric deposition rate and semiconductor chip made thereby | Minh Van Ngo, Paul R. Besser, Matthew S. Buynoski, John Caffall, Nick Maccrae +1 more | 2001-12-11 |
| 6317642 | Apparatus and methods for uniform scan dispensing of spin-on materials | Lu You, Dawn Hopper, Christof Streck, John G. Pellerin | 2001-11-13 |
| 6291329 | Protective oxide buffer layer for ARC removal | Lewis Shen | 2001-09-18 |
| 6281584 | Integrated circuit with improved adhesion between interfaces of conductive and dielectric surfaces | Minh Van Ngo, Guarionex Morales | 2001-08-28 |
| 6271120 | Method of enhanced silicide layer for advanced metal diffusion barrier layer application | Robin Cheung | 2001-08-07 |
| 6252303 | Intergration of low-K SiOF as inter-layer dielectric | — | 2001-06-26 |
| 6235453 | Low-k photoresist removal process | Lu You, Steven C. Avanzino, Jacques Bertrand | 2001-05-22 |
| 6232663 | Semiconductor device having interlayer insulator and method for fabricating thereof | Toshio Taniguchi, Kenji Nukui, Ibrahim K. Burki, Simon S. Chan, Kazunori Imaoka +1 more | 2001-05-15 |
| 6225240 | Rapid acceleration methods for global planarization of spin-on films | Lu You, Dawn Hopper | 2001-05-01 |