Issued Patents All Time
Showing 226–250 of 359 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6057584 | Semiconductor device having a tri-layer gate insulating dielectric | Mark I. Gardner, Mark C. Gilmer, Jack Lee | 2000-05-02 |
| 6057583 | Transistor with low resistance metal source and drain vertically displaced from the channel | Mark I. Gardner | 2000-05-02 |
| 6057194 | Method of forming trench transistor in combination with trench array | Mark I. Gardner, Derick J. Wristers | 2000-05-02 |
| 6051510 | Method of using a hard mask to grow dielectrics with varying characteristics | James F. Buller | 2000-04-18 |
| 6051487 | Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode | Mark I. Gardner, Mark C. Gilmer, Robert Paiz | 2000-04-18 |
| 6051471 | Method for making asymmetrical N-channel and symmetrical P-channel devices | Mark I. Gardner, Derick J. Wristers | 2000-04-18 |
| 6049134 | Mask generation technique for producing an integrated circuit with optimal metal interconnect layout for achieving global planarization | Mark W. Michael, Robert Dawson, Fred N. Hause, Basab Bandyopadhyay, William S. Brennan | 2000-04-11 |
| 6048785 | Semiconductor fabrication method of combining a plurality of fields defined by a reticle image using segment stitching | Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2000-04-11 |
| 6040607 | Self aligned method for differential oxidation rate at shallow trench isolation edge | Derick J. Wristers, Mark I. Gardner | 2000-03-21 |
| 6037224 | Method for growing dual oxide thickness using nitrided oxides for oxidation suppression | James F. Buller | 2000-03-14 |
| 6031289 | Integrated circuit which uses a recessed local conductor for producing staggered interconnect lines | Basab Bandyopadhyay, Robert Dawson, Fred N. Hause, Mark W. Michael, William S. Brennan | 2000-02-29 |
| 6030752 | Method of stitching segments defined by adjacent image patterns during the manufacture of a semiconductor device | Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2000-02-29 |
| 6020232 | Process of fabricating transistors having source and drain regions laterally displaced from the transistors gate | Mark I. Gardner | 2000-02-01 |
| 6018180 | Transistor formation with LI overetch immunity | Jon D. Cheek, Derick J. Wristers | 2000-01-25 |
| 6017802 | Ultra-short transistor fabrication scheme for enhanced reliability | Mark I. Gardner | 2000-01-25 |
| 6015739 | Method of making gate dielectric for sub-half micron MOS transistors including a graded dielectric constant | Mark I. Gardner, Dim-Lee Kwong | 2000-01-18 |
| 6013546 | Semiconductor device having a PMOS device with a source/drain region formed using a heavy atom p-type implant and method of manufacture thereof | Mark I. Gardner, Jack Lee | 2000-01-11 |
| 6011290 | Short channel length MOSFET transistor | Mark I. Gardner | 2000-01-04 |
| 6008109 | Trench isolation structure having a low K dielectric encapsulated by oxide | Mark I. Gardner, Charles E. May | 1999-12-28 |
| 6008095 | Process for formation of isolation trenches with high-K gate dielectrics | Mark I. Gardner, Charles E. May | 1999-12-28 |
| 6005285 | Argon doped epitaxial layers for inhibiting punchthrough within a semiconductor device | Mark I. Gardner, Charles E. May | 1999-12-21 |
| 5998288 | Ultra thin spacers formed laterally adjacent a gate conductor recessed below the upper surface of a substrate | Mark I. Gardner | 1999-12-07 |
| 5998293 | Multilevel interconnect structure of an integrated circuit having air gaps and pillars separating levels of interconnect | Robert Dawson, Mark W. Michael, William S. Brennan, Basab Bandyopadhyay, Fred N. Hause | 1999-12-07 |
| 5994175 | High performance MOSFET with low resistance design | Mark I. Gardner, Derick J. Wristers | 1999-11-30 |
| 5981368 | Enhanced shallow junction design by polysilicon line width reduction using oxidation with integrated spacer formation | Mark I. Gardner, Charles E. May | 1999-11-09 |