Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RP

Robert Paiz — 17 Patents

AMD: 15 patents #744 of 9,280Top 9%
APAdvanced Microdevices Pvt: 1 patents #2 of 26Top 8%
Austin, TX: #1,931 of 18,064 inventorsTop 15%
Texas: #8,472 of 125,132 inventorsTop 7%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Robert Paiz has been granted 17 US patents while listed as an inventor at AMD. The first was granted in 1998 and the most recent in April 2004. Robert Paiz ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Robert Paiz in Austin, TX, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6727569 Method of making enhanced trench oxide with low temperature nitrogen integration Mark I. Gardner, Mark C. Gilmer 2004-04-27 $2,236,000
6309936 Integrated formation of LDD and non-LDD semiconductor devices Mark I. Gardner, Thomas E. Spikes, Jr. 2001-10-30 $4,666,000
6214123 Chemical vapor deposition systems and methods for depositing films on semiconductor wafers Mark I. Gardner, Mark C. Gilmer 2001-04-10 $6,300,000
6194283 High density trench fill due to new spacer fill method including isotropically etching silicon nitride spacers Mark I. Gardner, Thomas E. Spikes, Jr. 2001-02-27 $7,317,000
6160316 Integrated circuit utilizing an air gap to reduce capacitance between adjacent metal linewidths Mark I. Gardner, Thomas E. Spikes, Jr. 2000-12-12 $4,351,000
6148832 Method and apparatus for in-situ cleaning of polysilicon-coated quartz furnaces Mark C. Gilmer, Mark I. Gardner 2000-11-21 $5,742,000
6140191 Method of making high performance MOSFET with integrated simultaneous formation of source/drain and gate regions Mark I. Gardner, Mark C. Gilmer 2000-10-31 $4,395,000
6051487 Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode Mark I. Gardner, H. Jim Fulford, Mark C. Gilmer 2000-04-18 $8,077,000
6043533 Method of integrating Ldd implantation for CMOS device fabrication Mark I. Gardner, Fred N. Hause 2000-03-28 $9,076,000
6037244 Method of manufacturing a semiconductor device using advanced contact formation Mark I. Gardner, Thomas E. Spikes, Jr., Frederick N. Hause, Sey-Ping Sun 2000-03-14 $8,869,000
5970350 Semiconductor device having a thin gate oxide and method of manufacture thereof Mark I. Gardner, Thomas, Jr. E. Spikes 1999-10-19 $1,257,000
5946581 Method of manufacturing a semiconductor device by doping an active region after formation of a relatively thick oxide layer Mark I. Gardner, Thomas E. Spikes, Jr. 1999-08-31 $2,486,000
5942787 Small gate electrode MOSFET Mark I. Gardner, Thomas E. Spikes, Jr. 1999-08-24 $2,354,000
5929496 Method and structure for channel length reduction in insulated gate field effect transistors Mark I. Gardner, Thomas E. Spikes, Jr. 1999-07-27
5918133 Semiconductor device having dual gate dielectric thickness along the channel and fabrication thereof Mark I. Gardner 1999-06-29 $2,567,000
5863818 Multilevel transistor fabrication method having an inverted, upper level transistor Daniel Kadosh, Mark I. Garnder 1999-01-26 $5,423,000
5851307 Method for in-situ cleaning of polysilicon-coated quartz furnaces Mark C. Gilmer, Mark I. Gardner 1998-12-22 $3,927,000