Mark C. Gilmer — 82 Patents at AMD

Mark C. Gilmer has been granted 82 US patents while listed as an inventor at AMD. The first was granted in 1998 and the most recent in April 2004. Mark C. Gilmer ranks #21,533 of 4,157,543 US inventors in our database (top 0.52%). Patent records list Mark C. Gilmer in Austin, TX, US.

Issued Patents All Time

Showing 1–25 of 82 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6727569	Method of making enhanced trench oxide with low temperature nitrogen integration	Mark I. Gardner, Robert Paiz	2004-04-27	$2,236,000
6373113	Nitrogenated gate structure for improved transistor performance and method for making same	Mark I. Gardner	2002-04-16	$2,231,000
6265749	Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant	Mark I. Gardner	2001-07-24	$3,903,000
6214123	Chemical vapor deposition systems and methods for depositing films on semiconductor wafers	Mark I. Gardner, Robert Paiz	2001-04-10	$6,300,000
6214690	Method of forming a semiconductor device having integrated electrode and isolation region formation	Mark I. Gardner	2001-04-10	$6,300,000
6211025	Method of making elevated source/drain using poly underlayer	Mark I. Gardner	2001-04-03	$5,058,000
6204130	Semiconductor device having reduced polysilicon gate electrode width and method of manufacture thereof	Mark I. Gardner	2001-03-20	$7,513,000
6197668	Ferroelectric-enhanced tantalum pentoxide for dielectric material applications in CMOS devices	Mark I. Gardner	2001-03-06	$8,714,000
6197647	Method of forming ultra-thin oxides with low temperature oxidation	Mark I. Gardner	2001-03-06	$8,714,000
6197644	High density mosfet fabrication method with integrated device scaling	Mark I. Gardner	2001-03-06	$8,714,000
6175144	Advanced isolation structure for high density semiconductor devices	Mark I. Gardner	2001-01-16	$7,676,000
6174794	Method of making high performance MOSFET with polished gate and source/drain feature	Mark I. Gardner	2001-01-16	$7,676,000
6172407	Source/drain and lightly doped drain formation at post interlevel dielectric isolation with high-K gate electrode design	Mark I. Gardner	2001-01-09	$4,016,000
6172402	Integrated circuit having transistors that include insulative punchthrough regions and method of formation	Mark I. Gardner, Daniel Kadosh	2001-01-09	$4,016,000
6169306	Semiconductor devices comprised of one or more epitaxial layers	Mark I. Gardner	2001-01-02	$6,157,000
6165314	Apparatus for performing jet vapor reduction of the thickness of process layers	Mark I. Gardner	2000-12-26	$2,711,000
6163060	Semiconductor device with a composite gate dielectric layer and gate barrier layer and method of making same	Mark I. Gardner	2000-12-19	$3,857,000
6153477	Ultra short transistor channel length formed using a gate dielectric having a relatively high dielectric constant	Mark I. Gardner	2000-11-28	$3,768,000
6152075	Method and system for heating semiconductor wafers	Mark I. Gardner	2000-11-28	$3,768,000
6148832	Method and apparatus for in-situ cleaning of polysilicon-coated quartz furnaces	Mark I. Gardner, Robert Paiz	2000-11-21	$5,742,000
6147004	Jet vapor reduction of the thickness of process layers	Mark I. Gardner	2000-11-14	$4,365,000
6140191	Method of making high performance MOSFET with integrated simultaneous formation of source/drain and gate regions	Mark I. Gardner, Robert Paiz	2000-10-31	$4,395,000
6140167	High performance MOSFET and method of forming the same using silicidation and junction implantation prior to gate formation	Mark I. Gardner, Frederick N. Hause	2000-10-31	$4,395,000
6130164	Semiconductor device having gate oxide formed by selective oxide removal and method of manufacture thereof	Mark I. Gardner	2000-10-10	$11,210,000
6127284	Method of manufacturing a semiconductor device having nitrogen-bearing oxide gate insulating layer	Mark I. Gardner	2000-10-03	$5,403,000

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Mark C. Gilmer — 82 Patents

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