Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5863818 | Multilevel transistor fabrication method having an inverted, upper level transistor | Daniel Kadosh, Robert Paiz | 1999-01-26 |
| 5852310 | Multi-level transistor fabrication method with a patterned upper transistor substrate and interconnection thereto | Daniel Kadosh, Jon D. Cheek | 1998-12-22 |
| 5770482 | Multi-level transistor fabrication method with a patterned upper transistor substrate and interconnection thereto | Daniel Kadosh, Jon D. Cheek | 1998-06-23 |
| 5731217 | Multi-level transistor fabrication method with a filled upper transistor substrate and interconnection thereto | Daniel Kadosh, Tom Spikes, Jr. | 1998-03-24 |