Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
BS

Bhanwar Singh

AMAMD: 250 patents #4 of 9,279Top 1%
Globalfoundries: 4 patents #817 of 4,424Top 20%
SLSpansion Llc.: 2 patents #309 of 769Top 45%
California: #321 of 386,348 inventorsTop 1%
Overall (All Time): #1,834 of 4,157,543Top 1%
259 Patents All Time

Issued Patents All Time

Showing 201–225 of 259 patents

Patent #TitleCo-InventorsDate
6416933 Method to produce small space pattern using plasma polymerization layer Bharath Rangarajan, Wenge Yang 2002-07-09
6417084 T-gate formation using a modified conventional poly process Marina V. Plat, Ramkumar Subramanian, Christopher F. Lyons 2002-07-09
6413857 Method of creating ground to avoid charging in SOI products Ramkumar Subramanian, Bharath Rangarajan 2002-07-02
6403456 T or T/Y gate formation using trim etch processing Marina V. Plat, Christopher F. Lyons, Ramkumar Subramanian 2002-06-11
6403500 Cross-shaped resist dispensing system and method James Yu, Kouros Ghandehari 2002-06-11
6396059 Using a crystallographic etched silicon sample to measure and control the electron beam width of a SEM Bryan K. Choo, Sanjay K. Yedur 2002-05-28
6383952 RELACS process to double the frequency or pitch of small feature formation Ramkumar Subramanian, Marina V. Plat, Christopher F. Lyons, Scott A. Bell 2002-05-07
6383947 Anti-reflective coating used in the fabrication of microcircuit structures in 0.18 micron and smaller technologies Paul R. Besser, Darrell M. Erb, Susan H. Chen, Carmen Morales 2002-05-07
6376013 Multiple nozzles for dispensing resist Bharath Rangarajan, Sanjay K. Yedur, Michael K. Templeton 2002-04-23
6373053 Analysis of CD-SEM signal to detect scummed/closed contact holes and lines Bryan K. Choo, Sanjay K. Yedur, Khoi A. Phan 2002-04-16
6371134 Ozone cleaning of wafers Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Sanjay K. Yedur, Bryan K. Choo 2002-04-16
6372614 Dual damascene method for backened metallization using poly stop layers Bharath Rangarajan, Ramkumar Subramanian 2002-04-16
6358843 Method of making ultra small vias for integrated circuits Carl P. Babcock 2002-03-19
6354133 Use of carbon nanotubes to calibrate conventional tips used in AFM Sanjay K. Yedur, Bryan K. Choo, Michael K. Templeton, Ramkumar Subramanian 2002-03-12
6352817 Methodology for mitigating formation of t-tops in photoresist Bharath Rangarajan, Steven C. Avanzino 2002-03-05
6339955 Thickness measurement using AFM for next generation lithography Khoi A. Phan, Bharath Rangarajan 2002-01-22
6335152 Use of RTA furnace for photoresist baking Ramkumar Subramanian, Bharath Rangarajan, Michael K. Templeton 2002-01-01
6329124 Method to produce high density memory cells and small spaces by using nitride spacer Bharath Rangarajan, Michael K. Templeton 2001-12-11
6326231 Use of silicon oxynitride ARC for metal layers Ramkumar Subramanian, Sanjay K. Yedur, Marina V. Plat, Christopher F. Lyons, Bharath Rangarajan +1 more 2001-12-04
6322009 Common nozzle for resist development Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan 2001-11-27
6319802 T-gate formation using modified damascene processing with two masks Ramkumar Subramanian, Christopher F. Lyons, Marina V. Plat 2001-11-20
6319643 Conductive photoresist pattern for long term calibration of scanning electron microscope Bryan K. Choo, Ramkumar Subramanian 2001-11-20
6313019 Y-gate formation using damascene processing Ramkumar Subramanian, Christopher F. Lyons, Marina V. Plat 2001-11-06
6291135 Ionization technique to reduce defects on next generation lithography mask during exposure Khoi A. Phan, Bharath Rangarajan 2001-09-18
6287959 Deep submicron metallization using deep UV photoresist Christopher F. Lyons 2001-09-11