Issued Patents 2018
Showing 151–175 of 338 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10008601 | Self-aligned gate cut with polysilicon liner oxidation | Peng Xu | 2018-06-26 |
| 10008596 | Channel-last replacement metal-gate vertical field effect transistor | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-06-26 |
| 10008585 | Semiconductor structure with an L-shaped bottom plate | Wilfried E. Haensch, Ali Khakifirooz, Davood Shahrjerdi | 2018-06-26 |
| 10008415 | Gate structure cut after formation of epitaxial active regions | Xiuyu Cai, Johnathan E. Faltermeier, Ali Khakifirooz, Theodorus E. Standaert, Ruilong Xie | 2018-06-26 |
| 10002809 | Top contact resistance measurement in vertical FETs | Zuoguang Liu, Xin Miao, Wenyu Xu, Chen Zhang | 2018-06-19 |
| 10002965 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Ruilong Xie, Tenko Yamashita | 2018-06-19 |
| 10002948 | FinFET having highly doped source and drain regions | Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2018-06-19 |
| 10002939 | Nanosheet transistors having thin and thick gate dielectric material | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2018-06-19 |
| 10002926 | Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy | Pouya Hashemi, Alexander Reznicek | 2018-06-19 |
| 10002795 | Method and structure for forming vertical transistors with shared gates and separate gates | Zhenxing Bi, Juntao Li, Peng Xu | 2018-06-19 |
| 10002925 | Strained semiconductor device | Peng Xu | 2018-06-19 |
| 10002794 | Multiple gate length vertical field-effect-transistors | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-06-19 |
| 10002924 | Devices including high percentage SiGe fins formed at a tight pitch and methods of manufacturing same | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-06-19 |
| 10002923 | Techniques for forming finFET transistors with same fin pitch and different source/drain epitaxy configurations | Peng Xu | 2018-06-19 |
| 10002868 | Vertical fin resistor devices | Zhenxing Bi, Peng Xu | 2018-06-19 |
| 10002803 | Flipped vertical field-effect-transistor | Xin Miao, Wenyu Xu, Chen Zhang | 2018-06-19 |
| 9997597 | Vertical single electron transistor formed by condensation | Xin Miao, Wenyu Xu, Chen Zhang | 2018-06-12 |
| 9997421 | Top contact resistance measurement in vertical FETS | Zuoguang Liu, Xin Miao, Wenyu Xu, Chen Zhang | 2018-06-12 |
| 9997540 | Structure and method for compressively strained silicon germanium fins for pFET devices and tensily strained silicon fins for nFET devices | Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2018-06-12 |
| 9997606 | Fully depleted SOI device for reducing parasitic back gate capacitance | Ramachandra Divakaruni | 2018-06-12 |
| 9997618 | Integrated strained stacked nanosheet FET | Ramachandra Divakaruni, Juntao Li, Xin Miao | 2018-06-12 |
| 9991166 | Wimpy device by selective laser annealing | Nicolas Loubet, Xin Miao, Alexander Reznicek | 2018-06-05 |
| 9991117 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, John R. Sporre, Sean Teehan | 2018-06-05 |
| 9991365 | Forming vertical transport field effect transistors with uniform bottom spacer thickness | Xuefeng Liu, Peng Xu, Yongan Xu | 2018-06-05 |
| 9991334 | Nanosheet capacitor | Zhenxing Bi, Dongbing Shao, Zheng Xu | 2018-06-05 |