XC

Xiuyu Cai

Globalfoundries: 17 patents #10 of 961Top 2%
IBM: 16 patents #226 of 10,623Top 3%
SS Stmicroelectronics Sa: 12 patents #4 of 127Top 4%
📍 San Diego, CA: #49 of 4,341 inventorsTop 2%
🗺 California: #278 of 60,411 inventorsTop 1%
Overall (2018): #1,569 of 503,207Top 1%
19
Patents 2018

Issued Patents 2018

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
10153371 Semiconductor device with fins including sidewall recesses Qing Liu, Ruilong Xie 2018-12-11
10134903 Vertical slit transistor with optimized AC performance Qing Liu, Chun-Chen Yeh, Ruilong Xie 2018-11-20
10134840 Series resistance reduction in vertically stacked silicon nanowire transistors Chun-Chen Yeh, Qing Liu, Ruilong Xie 2018-11-20
10062762 Semiconductor devices having low contact resistance and low current leakage Qing Liu, Chun-Chen Yeh, Ruilong Xie 2018-08-28
10032884 Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling Kangguo Cheng, Ali Khakifirooz, Ruilong Xie, Tenko Yamashita 2018-07-24
10032912 Semiconductor integrated structure having an epitaxial SiGe layer extending from silicon-containing regions formed between segments of oxide regions Pierre Morin, Kangguo Cheng, Jody A. Fronheiser, Juntao Li, Shogo Mochizuki +3 more 2018-07-24
10014299 Field effect transistor device spacers Sanjay C. Mehta, Tenko Yamashita 2018-07-03
10014379 Methods of forming semiconductor device with self-aligned contact elements and the resulting device Ruilong Xie 2018-07-03
10008415 Gate structure cut after formation of epitaxial active regions Kangguo Cheng, Johnathan E. Faltermeier, Ali Khakifirooz, Theodorus E. Standaert, Ruilong Xie 2018-06-26
9985135 Replacement low-k spacer Kangguo Cheng, Ali Khakifirooz, Ruilong Xie 2018-05-29
9941388 Method and structure for protecting gates during epitaxial growth Ying Hao Hsieh 2018-04-10
9935201 High doped III-V source/drain junctions for field effect transistors Qing Liu, Kejia Wang, Ruilong Xie, Chun-Chen Yeh 2018-04-03
9935179 Method for making semiconductor device with filled gate line end recesses Qing Liu, Kejia Wang, Ruilong Xie, Chun-Chen Yeh 2018-04-03
9929253 Method for making a semiconductor device with sidewal spacers for confinig epitaxial growth Qing Liu, Ruilong Xie, Chun-Chen Yeh 2018-03-27
9922883 Method for making strained semiconductor device and related methods Qing Liu, Ruilong Xie, Chun-Chen Yeh 2018-03-20
9917195 High doped III-V source/drain junctions for field effect transistors Qing Liu, Kejia Wang, Ruilong Xie, Chun-Chen Yeh 2018-03-13
9892926 Replacement low-k spacer Kangguo Cheng, Ali Khakifirooz, Ruilong Xie 2018-02-13
9887196 FinFET including tunable fin height and tunable fin width ratio Qing Liu, Ruilong Xie, Chun-Chen Yeh 2018-02-06
9859423 Hetero-channel FinFET Qing Liu, Ruilong Xie, Chun-Chen Yeh 2018-01-02