Issued Patents 2017
Showing 76–100 of 204 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9748385 | Method for forming vertical Schottky contact FET | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-08-29 |
| 9748359 | Vertical transistor bottom spacer formation | Oleg Gluschenkov, Sanjay C. Mehta, Shogo Mochizuki | 2017-08-29 |
| 9748365 | SiGe and Si FinFET structures and methods for making the same | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2017-08-29 |
| 9741807 | FinFET device with vertical silicide on recessed source/drain epitaxy regions | Keith E. Fogel, Pranita Kerber, Qiqing C. Ouyang | 2017-08-22 |
| 9741626 | Vertical transistor with uniform bottom spacer formed by selective oxidation | Kangguo Cheng, Nicolas Loubet, Xin Miao | 2017-08-22 |
| 9735176 | Stacked nanowires with multi-threshold voltage solution for PFETS | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-08-15 |
| 9735257 | finFET having highly doped source and drain regions | Kangguo Cheng, Ali Khakifirooz, Dominic J. Schepis | 2017-08-15 |
| 9735272 | Method to controllably etch silicon recess for ultra shallow junctions | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2017-08-15 |
| 9735062 | Defect reduction in channel silicon germanium on patterned silicon | Bruce B. Doris, Nicolas Loubet, Joshua M. Rubin | 2017-08-15 |
| 9735160 | Method of co-integration of strained silicon and strained germanium in semiconductor devices including fin structures | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2017-08-15 |
| 9735165 | Vertically stacked FinFET fuse | Praneet Adusumilli, Oscar van der Straten | 2017-08-15 |
| 9735175 | Integrated circuit with heterogeneous CMOS integration of strained silicon germanium and group III-V semiconductor materials and method to fabricate same | Cheng-Wei Cheng, Pouya Hashemi, Effendi Leobandung | 2017-08-15 |
| 9728649 | Semiconductor device including embedded crystalline back-gate bias planes, related design structure and method of fabrication | Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Raghavasimhan Sreenivasan | 2017-08-08 |
| 9726634 | Superhydrophobic electrode and biosensing device using the same | Ali Afzali-Ardakani, Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari | 2017-08-08 |
| 9728542 | High density programmable e-fuse co-integrated with vertical FETs | Karthik Balakrishnan, Michael A. Guillorn, Pouya Hashemi | 2017-08-08 |
| 9728626 | Almost defect-free active channel region | Dominic J. Schepis, Charan V. Surisetty, Kangguo Cheng | 2017-08-08 |
| 9722048 | Vertical transistors with reduced bottom electrode series resistance | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-08-01 |
| 9722038 | Metal cap protection layer for gate and contact metallization | Praneet Adusumilli, Hemanth Jagannathan, Oscar van der Straten, Chih-Chao Yang | 2017-08-01 |
| 9722052 | Fin cut without residual fin defects | Kangguo Cheng, Pouya Hashemi, Dominic J. Schepis | 2017-08-01 |
| 9721851 | Silicon-germanium fin formation | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2017-08-01 |
| 9721970 | Gate all-around FinFET device and a method of manufacturing same | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-08-01 |
| 9716145 | Strained stacked nanowire field-effect transistors (FETs) | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-07-25 |
| 9716155 | Vertical field-effect-transistors having multiple threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-07-25 |
| 9716086 | Method and structure for forming buried ESD with FinFETs | Kangguo Cheng, Nicolas Loubet, Xin Miao | 2017-07-25 |
| 9716173 | Compressive strain semiconductor substrates | Karthik Balakrishnan, Pouya Hashemi, Nicolas Loubet | 2017-07-25 |