| 9837357 |
Method to reduce variability in contact resistance |
Praneet Adusumilli, Christian Lavoie, Jean L. Sweet |
2017-12-05 |
| 9824930 |
Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme |
Takashi Ando, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon, Rekha Rajaram |
2017-11-21 |
| 9818616 |
Controlling threshold voltage in nanosheet transistors |
Paul C. Jamison |
2017-11-14 |
| 9773875 |
Fabrication of silicon-germanium fin structure having silicon-rich outer surface |
Choonghyun Lee, Shogo Mochizuki, Koji Watanabe |
2017-09-26 |
| 9761722 |
Isolation of bulk FET devices with embedded stressors |
Nicolas Loubet |
2017-09-12 |
| 9761655 |
Stacked planar capacitors with scaled EOT |
Takashi Ando, Lawrence A. Clevenger, Roger A. Quon |
2017-09-12 |
| 9754967 |
Structure for integration of an III-V compound semiconductor on SOI |
Alexander Reznicek |
2017-09-05 |
| 9741822 |
Simplified gate stack process to improve dual channel CMOS performance |
Choonghyun Lee, Richard Southwick |
2017-08-22 |
| 9741812 |
Dual metal interconnect structure |
Praneet Adusumilli, Koichi Motoyama, Oscar van der Straten |
2017-08-22 |
| 9721842 |
Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme |
Takashi Ando, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon, Rekha Rajaram |
2017-08-01 |
| 9722038 |
Metal cap protection layer for gate and contact metallization |
Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten, Chih-Chao Yang |
2017-08-01 |
| 9666486 |
Contained punch through stopper for CMOS structures on a strain relaxed buffer substrate |
Mona A. Ebrish, Shogo Mochizuki, Alexander Reznicek |
2017-05-30 |
| 9659938 |
Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins |
Alexander Reznicek |
2017-05-23 |
| 9653537 |
Controlling threshold voltage in nanosheet transistors |
Paul C. Jamison |
2017-05-16 |
| 9627214 |
Stratified gate dielectric stack for gate dielectric leakage reduction |
Paul C. Jamison |
2017-04-18 |
| 9627510 |
Structure and method for replacement gate integration with self-aligned contacts |
Sivananda K. Kanakasabapathy |
2017-04-18 |
| 9595449 |
Silicon-germanium semiconductor devices and method of making |
Choonghyun Lee |
2017-03-14 |
| 9589845 |
Fin cut enabling single diffusion breaks |
Sivananda K. Kanakasabapathy, Vamsi K. Paruchuri, Alexander Reznicek |
2017-03-07 |
| 9583489 |
Solid state diffusion doping for bulk finFET devices |
Brent A. Anderson, Sanjay C. Mehta, Balasubramanian Pranatharthiharan |
2017-02-28 |
| 9577062 |
Dual metal gate electrode for reducing threshold voltage |
Hiroshi Sunamura |
2017-02-21 |
| 9570569 |
Selective thickening of PFET dielectric |
Takashi Ando, Barry P. Linder |
2017-02-14 |
| 9548319 |
Structure for integration of an III-V compound semiconductor on SOI |
Alexander Reznicek |
2017-01-17 |
